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參數資料
| 型號： | AS91L1002S10L100I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Surface Mount Resistors Thick Film Chip Resistors |
| 中文描述： | 該AS91L1006BU是一個6口的JTAG網關 |
| 文件頁數： | 15/28頁 |
| 文件大小： | 415K |
| 代理商： | AS91L1002S10L100I |
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July 2004
AS91L1006BU
PIN NAME
PIN
TYPE
PIN
NUMBER
LQFP
81
PIN
NUMBER
FPBGA
A7
DESCRIPTION
Stable state
after port/reset
LSP4_TRST
OUT
IEEE1149.1 Test Reset on LSP 4
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 011.
This pin is tri-stated for all other
combinations.
Flash, Memory Auto-Write on LSP 4
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 011;
PRIM_AutoWR is routed to output.
This pin is tri-stated for all other
combinations.
PASS_THRU Debug Enable Output
on LSP 4.
Active low output when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 011.
This pin is high for all other
combinations.
IEEE1149.1 Test Clock on LSP 5
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100.
This pin is tri-stated for all other
combinations.
IEEE1149.1 Test Mode Select on
LSP 5 when PASS_THRU_ENABLE
is HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 100.
This pin is tri-stated for all other
combinations.
Buffered version
of signal present
on primary TRST
LSP4_AutoWR
OUT
80
B8
Logic '1'
LSP4_DE
OUT
83
B7
Logic '1'
LSP5_TCK
OUT
70
D10
Buffered version
of signal present
on primary TCK
LSP5_TMS
OUT
69
D9
Logic '1'
www.alsc.com
Alliance Semiconductor
15
2003, 2004 Copyright Alliance Semconductor Corporation. All Rights reserved.
相關PDF資料 |
PDF描述 |
|---|---|
| AS91L1002S10L100IG | The AS91L1006BU is a one to 6-port JTAG gateway |
| AS91L1006S40L100C | The AS91L1006BU is a one to 6-port JTAG gateway |
| AS91L1006BU10L100IG | Ceramic Conformally Coated / Radial 'Standard & High Voltage Golden Max'; Capacitance [nom]: 3.3pF; Working Voltage (Vdc)[max]: 200V; Capacitance Tolerance: +/-0.5pF; Dielectric: Multilayer Ceramic, Conformally Coated; Temperature Coefficient: C0G (NP0); Lead Style: Radial Leaded; Lead Dimensions: 0.100" Lead Spacing; Body Dimensions: 0.150" x 0.210" x 0.130"; Container: Bag; Qty per Container: 500 |
| AS91L1006BU40F100C | The AS91L1006BU is a one to 6-port JTAG gateway |
| AS91L1006BU40L100C | Ceramic Conformally Coated / Radial 'Standard & High Voltage Golden Max'; Capacitance [nom]: 36pF; Working Voltage (Vdc)[max]: 100V; Capacitance Tolerance: +/-5%; Dielectric: Multilayer Ceramic, Conformally Coated; Temperature Coefficient: C0G (NP0); Lead Style: Radial Leaded; Lead Dimensions: 0.100" Lead Spacing; Body Dimensions: 0.150" x 0.210" x 0.130"; Container: Bag; Qty per Container: 500 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AS91L1002S10L100IF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:The AS91L1006BU is a one to 6-port JTAG gateway |
| AS91L1002S10L100IG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:The AS91L1006BU is a one to 6-port JTAG gateway |
| AS91L1002S40F100C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:The AS91L1006BU is a one to 6-port JTAG gateway |
| AS91L1002S40F100CF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:The AS91L1006BU is a one to 6-port JTAG gateway |
| AS91L1002S40F100CG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:The AS91L1006BU is a one to 6-port JTAG gateway |
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