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參數(shù)資料
型號: AS91L1003S10L100C
廠商: Electronic Theatre Controls, Inc.
英文描述: The AS91L1006BU is a one to 6-port JTAG gateway
中文描述: 該AS91L1006BU是一個6口的JTAG網(wǎng)關(guān)
文件頁數(shù): 11/28頁
文件大?。?/td> 415K
代理商: AS91L1003S10L100C
July 2004
AS91L1006BU
PIN NAME
PIN
TYPE
PIN
NUMBER
LQFP
30
PIN
NUMBER
FPBGA
J3
DESCRIPTION
Stable state
after port/reset
LSP1_AutoWR
OUT
Flash, Memory Auto-Write on LSP 1
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 000;
PRIM_AutoWR is routed to output.
This pin is tri-stated for all other
combinations.
Pass-Through Debug Enable Output
on Local Scan Port 1.
Active low output when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 000.
This pin is high for all other
combinations.
IEEE1149.1 Test Clock on LSP 2
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 001.
This pin is tri-stated for all other
combinations.
IEEE1149.1 Test Mode Select on
LSP 2 when PASS_THRU_ENABLE
is HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 001.
This pin is tri-stated for all other
combinations.
IEEE1149.1 Test Data Out on LSP 2
when PASS_THRU_ENABLE is
HIGH.
Pin is in Pass-Through mode when
PASS_THRU_ENABLE = 0 and
PASS_THRU_SEL[2:0] = 001.
This pin is tri-stated for all other
combinations.
Logic '1'
LSP1_DE
OUT
28
J2
Logic '1'
LSP2_TCK
OUT
41
J6
Buffered version
of signal present
on primary TCK
LSP2_TMS
OUT
42
H6
Logic '1'
LSP2_TDO
OUT
45
J7
Logic '1'
www.alsc.com
Alliance Semiconductor
11
2003, 2004 Copyright Alliance Semconductor Corporation. All Rights reserved.
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