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參數(shù)資料
| 型號： | ATS645LSHTN-I1 |
| 廠商： | Allegro Microsystems Inc |
| 文件頁數(shù)： | 12/14頁 |
| 文件大小： | 381K |
| 描述： | IC SENSOR GEAR TOOTH 4-SIP |
| 標準包裝： | 800 |
| 傳感范圍： | 120mV 跳閘，120mV 釋放 |
| 類型： | 專用型 |
| 電源電壓： | 4 V ~ 24 V |
| 電流 - 電源： | 8mA |
| 輸出類型： | 數(shù)字，開路集電極 |
| 特點： | 輪齒類型 |
| 工作溫度： | -40°C ~ 150°C |
| 封裝/外殼： | 4-SIP |
| 供應商設備封裝： | 4-SIP |
| 包裝： | 帶卷 (TR) |
True Zero Speed Miniature Differential Peak-
Detecting Gear Tooth Sensor IC
ATS645LSH
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
DEVICE OPERATION
Each operating mode is described in detail below.
Power-On
When power (V
CC
> V
CCMIN
) is applied to the device, a short
period of time is required to power the various portions of the
IC. During this period, the ATS645 is guaranteed to power-on in
the high current state, I
CC(High)
.
Initial Offset Adjust
The IC intially cancels the effects of chip, magnet, and installa-
tion offsets. Once offsets have been cancelled, the digital track-
ing DAC is ready to track the signal and provide output switch-
ing. The period of time required for both Power-On and Initial
Offset Adjust is de ned as the Power-On Time.
Calibration Mode
The calibration mode allows the IC to automatically select
the proper signal gain and continue to adjust for offsets. The
AGC is active, and selects the optimal signal gain based on the
amplitude of the V
PROC
signal. Following each adjustment to
the AGC DAC, the Offset DAC is also adjusted to ensure the
internal analog signal is properly centered.
During this mode, the tracking DAC is active and output switch-
ing occurs, but the duty cycle is not guaranteed to be within
speci cation.
Diagnostics
The regulated current output is con gured for two wire appli-
cations, requiring one less wire for operation than do switches
with the more traditional open-collector output. Additionally,
the system designer inherently gains diagnostics because there
is always output current flowing, which should be in either of
two narrow ranges. Any current level not within these ranges
indicates a fault condition.
Running Mode
After the initial calibration period, C
I
, during which a signal
gain is established, the device moves to Running mode. Dur-
ing Running mode, the IC tracks the input signal and gives an
output edge for every peak of the signal. AOA remains active to
compensate for any offset drift over time.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ATS645LSHTN-I1-T | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:True Zero Speed Miniature Gear Tooth Sensor |
| ATS645LSHTN-I2-T | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:True Zero Speed Miniature Gear Tooth Sensor |
| ATS651LSH | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:Two-Wire Self-Calibrating Differential Speed and Direction Sensor with Vibration Immunity |
| ATS651LSH_05 | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:Two-Wire Self-Calibrating Differential Speed and Direction Sensor with Vibration Immunity |
| ATS651LSHTN-T | 制造商:Allegro MicroSystems LLC 功能描述:GEAR TOOTH SENSOR 2-WIRE SH MODULE |
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