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參數資料
| 型號： | ATS667LSGTN-T |
| 廠商： | Allegro Microsystems Inc |
| 文件頁數： | 9/14頁 |
| 文件大小： | 424K |
| 描述： | IC SENSOR GEAR TOOTH 4SIP |
| 產品培訓模塊： | Current Sensor |
| 標準包裝： | 1 |
| 傳感范圍： | 70% 空氣間隙跳閘，30% 空氣間隙釋放 |
| 類型： | 專用型 |
| 電源電壓： | 4 V ~ 24 V |
| 電流 - 電源： | 12mA |
| 電流 - 輸出（最大）： | 25mA |
| 輸出類型： | 數字，開路集電極 |
| 特點： | 輪齒類型 |
| 工作溫度： | -40°C ~ 150°C |
| 封裝/外殼： | 4-SIP |
| 供應商設備封裝： | 4-SIP |
| 包裝： | 標準包裝 |
| 產品目錄頁面： | 1142 (CN2011-ZH PDF) |
| 其它名稱： | 620-1328-6 |
True Zero-Speed, High Accuracy Gear Tooth Sensor IC
ATS667LSG
9
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Continuous Update of Switchpoints
Switchpoints are the threshold levels of the differential internal
analog signal, V
PROC
, at which the device changes output signal
state. The value of V
PROC
is directly proportional to the magnetic flux
density, B, induced by the target and sensed by the Hall elements.
As V
PROC
rises through a certain limit, referred to as the operate
point, B
OP
, the output state changes from high to low. As V
PROC
falls below B
OP
to a certain limit, the release point, B
RP
, the output
state changes from low to high.
As shown in panel C of figure 4, threshold levels for the ATS667
switchpoints are established as a function of the peak input signal
levels. The ATS667 incorporates an algorithm that continuously
monitors the input signal and updates the switching thresholds
accordingly with limited inward movement of V
PROC
. The
switchpoint for each edge is determined by the detection of the
previous two signal edges. In this manner, variations are tracked
in real time.
(A) TEAG varying; cases such as
eccentric mount, out-of-round region,
normal operation position shift
(B) Internal analog signal, V
PROC
,
typically resulting in the IC
0
360
Target Rotation (?
Hysteresis Band
(Delimited by switchpoints)
V+
Larger
TEAG
Smaller
TEAG
IC
Target
Larger
TEAG
Target
IC
Smaller
TEAG
Smaller
TEAG
Pk
(#4)
Pk
(#5)
Pk
(#7)
Pk
(#9)
Pk
(#2)
Pk
(#3)
Pk
(#1)
Pk
(#6)
Pk
(#8)
B
HYS(#4)
B
HYS(#3)
V+
B
RP(#1)
B
OP(#1)
B
RP(#2)
B
RP(#3)
B
OP(#3)
B
RP(#4)
B
OP(#4)
B
OP(#2)
V
PROC(BOP)
(#1)
V
PROC(BOP)(#2)
V
PROC(BOP)(#3)
V
PROC(BOP)(#4)
V
PROC(BRP)(#1)
V
PROC(BRP)(#2)
V
PROC(BRP)(#3)
V
PROC(BRP)
(#4)
B
HYS(#1)
B
HYS(#2)
B
HYS
Switchpoint
Determinant
Peak Values
1
B
OP(#1)
Pk
(#1)
, Pk
(#2)
B
RP(#1)
Pk
(#2)
, Pk
(#3)
2
B
OP(#2)
Pk
(#3)
, Pk
(#4)
B
RP(#2)
Pk
(#4)
, Pk
(#5)
3
B
OP(#3)
Pk
(#5)
, Pk
(#6)
B
RP(#3)
Pk
(#6)
, Pk
(#7)
4
B
OP(#4)
Pk
(#7)
, Pk
(#8)
B
RP(#4)
Pk
(#8)
, Pk
(#9)
(C) Referencing the internal analog signal, V
PROC
, to continuously update device response
Figure 4. The Continuous Update algorithm allows the Allegro IC to interpret and adapt to variances in the magnetic field generated by the
target as a result of eccentric mounting of the target, out-of-round target shape, and similar dynamic application problems that affect the TEAG
(Total Effective Air Gap). Not detailed in the figure are the boundaries for peak capture DAC movement which intentionally limit the amount of
inward signal variation the IC is able to react to over a single transition. The algorithm is used to establish and subsequently update the device
switchpoints (B
OP
and B
RP
). The hysteresis, B
HYS(#x)
, at each target feature configuration results from this recalibration, ensuring that it remains
properly proportioned and centered within the peak-to-peak range of the internal analog signal, V
PROC
.
As shown in panel A, the variance in the target position results in a change in the TEAG. This affects the IC as a varying magnetic field, which
results in proportional changes in the internal analog signal, V
PROC
, shown in panel B. The Continuous Update algorithm is used to establish
switchpoints based on the fluctuation of V
PROC
, as shown in panel C.
相關PDF資料 |
PDF描述 |
|---|---|
| ATS674LSETN-LT-T | IC SENSOR GEAR TOOTH 4-SIP |
| ATS682LSHTN-T | IC HALL EFFECT SENSOR 4SIP |
| ATS685LSHTN-T | IC HALL EFFECT GEAR SENSOR 4SIP |
| BU52001GUL-E2 | IC HALL EFFECT SW BIPO VCSP50L1 |
| BU52003GUL-E2 | IC HALL EFFECT SW BIPO VCSP50L1 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ATS668LSMTN-T | 功能描述:THREE-WIRE DIFFERENTIAL SPEED SE 制造商:allegro microsystems, llc 系列:* 零件狀態:在售 標準包裝:1 |
| ATS671LSE | 制造商:Allegro MicroSystems LLC 功能描述: |
| ATS671LSE-T | 制造商:Allegro MicroSystems LLC 功能描述: |
| ATS672LSB | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:Self-Calibrating Gear Tooth Sensor with 9-Bit Signal Capture |
| ATS672LSB_03 | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:Self-Calibrating Gear Tooth Sensor with 9-Bit Signal Capture |
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