- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379700 > ATT3030-70M84I (Electronic Theatre Controls, Inc.) Field-Programmable Gate Arrays PDF資料下載
參數(shù)資料
| 型號： | ATT3030-70M84I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | FPGA |
| 英文描述： | Field-Programmable Gate Arrays |
| 中文描述： | 現(xiàn)場可編程門陣列 |
| 文件頁數(shù)： | 32/80頁 |
| 文件大小： | 528K |
| 代理商： | ATT3030-70M84I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁當(dāng)前第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁
Data Sheet
February 1997
ATT3000 Series Field-Programmable Gate Arrays
32
Lucent Technologies Inc.
Power
Power Distribution
Power for the FPGA is distributed through a grid to
achieve high noise immunity and isolation between
logic and I/O. Inside the FPGA, a dedicated V
CC
and
ground ring surrounding the logic array provides power
to the I/O drivers (see Figure 31 below). An indepen-
dent matrix of V
CC
and ground lines supplies the inte-
rior logic of the device. This power distribution grid
provides a stable supply and ground for all internal
logic, provided that the external package power pins
are all connected and appropriately decoupled. Typi-
cally, a 0.1 μF capacitor connected near the V
CC
and
ground pins of the package will provide adequate
decoupling.
Output buffers which drive the specified 4 mA loads
under worst-case conditions may drive 25 to 30 times
this amount under best-case process conditions. Noise
can be reduced by minimizing external load capaci-
tance and reducing simultaneous output transitions in
the same direction. It may also be beneficial to locate
heavily loaded output buffers near the ground pads.
The IOB output buffers have a slew-limited mode which
should be used where output rise and fall times are not
speed critical.
Slew-limited outputs maintain their dc drive capability
but generate less external reflections and internal
noise. More than 32 fast outputs should not be switch-
ing in the same direction simultaneously.
Figure 31. FPGA Power Distribution
V
CC
V
CC
GND
GND
GROUND AND
V
CC
RING FOR
I/O DRIVERS
LOGIC POWER GRID
5-3122(F)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ATT3030-70S132I | Field-Programmable Gate Arrays |
| ATT3030-70S44I | Field-Programmable Gate Arrays |
| ATT3030-70S68I | Field-Programmable Gate Arrays |
| ATT3030-70S84I | Field-Programmable Gate Arrays |
| ATT3030-70T132I | Field-Programmable Gate Arrays |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATT3030-70S132I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| ATT3030-70S44I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| ATT3030-70S68I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| ATT3030-70S84I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Gate Arrays |
| ATT3030-70T100I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。