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參數(shù)資料
| 型號： | BS62LV2006TIG55 |
| 廠商： | BRILLIANCE SEMICONDUCTOR, INC. |
| 英文描述： | Very Low Power/Voltage CMOS SRAM 256K X 8 bit |
| 中文描述： | 非常低功率/電壓CMOS SRAM的256K × 8位 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 321K |
| 代理商： | BS62LV2006TIG55 |
R0201-BS62LV2006
Revision 1.1
Jan.
2004
1
A17
Very Low Power/Voltage CMOS SRAM
256K X 8 bit
Wide Vcc operation voltage : 2.4V~5.5V
Very low power consumption :
Vcc = 3.0V
C-grade : 22mA (@55ns) operating current
I- grade : 23mA (@55ns) operating current
C-grade : 17mA (@70ns) operating current
I- grade : 18mA (@70ns) operating current
0.3uA (Typ.) CMOS standby current
Vcc = 5.0V
C-grade : 53mA (@55ns) operating current
I- grade : 55mA (@55ns) operating current
C-grade : 43mA (@70ns) operating current
I- grade : 45mA (@70ns) operating current
1.0uA (Typ.) CMOS standby current
High speed access time :
-55
55ns
-70
70ns
Automatic power down when chip is deselected
Three state outputs and TTL compatible
The BS62LV2006 is a high performance, very low power CMOS
Static Random Access Memory organized as 262,144 words by 8 bits
and operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.3uA at 3.0V /25oC and maximum access time of 55ns at 3.0V/85oC.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62LV2006 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV2006 is available in DICE form, JEDEC standard 32 pin
450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.
DESCRIPTION
FEATURES
BLOCK DIAGRAM
PRODUCT FAMILY
PIN CONFIGURATIONS
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
Address
Input
Buffer
Row
Decoder
Memory Array
1024 x 2048
Column I/O
Write Driver
Sense Amp
Column Decoder
Data
Buffer
Output
Address Input Buffer
A8 A3 A2 A1
A10
Data
Buffer
Input
Control
Gnd
Vdd
OE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A16
A5
A4
A6
A7
A15
A13
8
16
256
2048
1024
20
A14
A12
A9
BS62LV2006
A11
A0
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
A11
A9
A8
A13
WE
CE2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
BS62LV2006TC
BS62LV2006STC
BS62LV2006TI
BS62LV2006STI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
WE
CE1
CE2
BSI
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
BS62LV2006SC
BS62LV2006SI
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
POWER DISSIPATION
SPEED
( ns )
STANDBY
( ICCSB1, Max )
Operating
( ICC, Max )
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
55ns :3.0~5.5V
Vcc=3.0V
PKG TYPE
BS62LV2006DC
DICE
BS62LV2006TC
TSOP-32
BS62LV2006STC
STSOP-32
BS62LV2006SC
+0 O C to +70 O C
2.4V ~5.5V
55/70
3.0uA
17mA
SOP-32
BS62LV2006DI
DICE
BS62LV2006TI
TSOP-32
BS62LV2006STI
STSOP-32
BS62LV2006SI
-40 O C to +85 O C
2.4V ~ 5.5V
55/70
5.0uA
18mA
SOP-32
Vcc=5.0V
10uA
30uA
43mA
45mA
70ns :2.7~5.5V
Fully static operation
Data retention supply voltage as low as 1.5V
Easy expansion with CE2, CE1, and OE options
70ns
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PDF描述 |
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| BS62LV2006TIP55 | Very Low Power/Voltage CMOS SRAM 256K X 8 bit |
| BS62LV2006TIP70 | Very Low Power/Voltage CMOS SRAM 256K X 8 bit |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BS62LV2006TIG70 | 制造商:BSI 制造商全稱:Brilliance Semiconductor 功能描述:Very Low Power/Voltage CMOS SRAM 256K X 8 bit |
| BS62LV2006TIP55 | 制造商:Brilliance Semiconductor Inc 功能描述:SRAM 2M 256KX8 2.4-5.5V TSOP32 |
| BS62LV2006TIP70 | 制造商:BSI 制造商全稱:Brilliance Semiconductor 功能描述:Very Low Power CMOS SRAM 256K X 8 bit |
| BS62LV2007 | 制造商:BSI 制造商全稱:Brilliance Semiconductor 功能描述:Very Low Power/Voltage CMOS SRAM 256K X 8 bit |
| BS62LV2007HC | 制造商:BSI 制造商全稱:Brilliance Semiconductor 功能描述:Very Low Power/Voltage CMOS SRAM 256K X 8 bit |
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