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參數資料
| 型號： | BU-65863G3-290 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80 |
| 封裝： | 22.60 X 22.60 MM, 3.30 MM HEIGHT, CERAMIC, QFP-80 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 1566K |
| 代理商： | BU-65863G3-290 |
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
FOR MORE INFORMATION CONTACT:
Technical Support:
1-800-DDC-5757 ext. 7771
FEATURES
32-Bit/33MHz,3.3Volt,PCITarget
Interface
FullyIntegrated1553A/BNotice2,
1760,McAir,STANAG3838Interface
Terminal
All+3.3VOperationor+3.3VLogic
and+5VTransceivers
0.88inchsquare,80-PinCQFP(PCI
Mini-ACEMark3)or0.80inchsquare
324ballBGA(PCIMicro-ACETE)
CompatiblewithPCIEnhancedMini-
ACE,EnhancedMini-ACE,Mini-ACE
andACEGenerations
Choiceof:
-RTonlywith4KRAM(BU-65743)
-BC/RT/MTwith4KRAM(BU-65843)
-BC/RT/MTwith64KRAM,andRAM
Parity(BU-65863,BU-65864)
SleepModeOption
Choiceof10,12,16,or20MHz1553
Clock
HighlyAutonomousBCwithBuilt-In
MessageSequenceControl:
-FrameScheduling
-Branching
-AsynchronousMessageInsertion
-GeneralPurposeQueue
-User-definedInterrupts
AdvancedRTFunctions
-GlobalCircularBuffering
-InterruptStatusQueue
-50%CircularBufferRollover
Interrupts
SelectiveMessageMonitoror
RT/Monitor
DESCRIPTION
The PCI Mini-ACE Mark3/Micro-ACE TE family of MIL-STD-1553 terminals
provides a complete interface between a 32-Bit/33Mhz 3.3V signaling PCI Bus
and a MIL-STD-1553 bus. These terminals integrate dual transceiver, protocol
logic, and 4K or 64K words of RAM, all of which can be powered from 3.3V.
With a 0.88-inch square package, the PCI Mini-ACE Mark3 is the smallest
ceramic CQFP PCI 1553 solution available. The 0.80-inch square 324 ball BGA
PCI Micro-ACE TE has an even smaller footprint, but has a more restricted
operating temperature range. Both are 100% software compatible with the
larger PCI Enhanced Mini-ACE and add TAG_CLK inputs. The TAG_CLK input
allows a software selectable external time tag clock input. Both parts are avail-
able with a choice of either 3.3V transceivers or 5V transceivers.
The PCI Micro-ACE TE has a more restricted set of options compared to the
PCI Mini-ACE Mark3. Please consult the ordering information at the rear of the
data sheet to see which options are available. In addition, the PCI Micro-ACE
TE adds RTBOOT and 1553 clock select inputs for applications which must
boot into RT mode with Busy bit set.
The PCI Mini-ACE Mark3/Micro-ACE TE is nearly 100% software compatible
with the Enhanced Mini-ACE and previous generation Mini-ACE terminals. The
PCI interface to this terminal is not 5V tolerant.
Multiprotocol support of MIL-STD-1553A/B and STANAG 3838, including
Mark3 versions incorporating McAir compatible transmitters, is provided. There
is a choice of 10, 12, 16, or 20 MHz 1553 clocks. The BC/RT/MT versions with
64K words of RAM include built-in RAM parity checking.
BC features include a built-in message sequence control engine, with a set of
20 instructions. This provides an autonomous means of implementing multi-
frame message scheduling, message retry schemes, data double buffering,
asynchronous message insertion, and reporting to the host CPU.
The PCI Mini-ACE Mark3 and Micro-ACE TE RT offer single and circular sub-
address buffering schemes, along with a global circular buffering option, 50%
rollover interrupt for circular buffers, and an interrupt status queue.
2003 Data Device Corporation
BU-65743/65843/65863/65864
PCIMINI-ACEMARK3AND
PCIMICRO-ACE*-TE
Make sure the next
Card you purchase
has...
* The technology used in DDC’s Micro-ACE series of products may be
subject to one or more patents pending.
All trademarks are the property of their respective owners.
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