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參數資料
| 型號： | BUK583-60A |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | PowerMOS transistor Logic level FET |
| 中文描述： | 3.2 A, 60 V, 0.1 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 文件頁數： | 1/8頁 |
| 文件大小： | 55K |
| 代理商： | BUK583-60A |
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level FET
BUK583-60A
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode
logic level field-effect power
transistor in a plastic envelope
suitable for surface mount
applications.
The device is intended for use in
automotive and general purpose
switching applications.
SYMBOL
PARAMETER
MAX.
UNIT
V
DS
I
D
P
tot
T
j
R
DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
60
3.2
1.8
150
0.10
V
A
W
C
V
GS
= 5 V
PINNING - SOT223
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
4
drain (tab)
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
V
DS
Drain-source voltage
V
DGR
Drain-gate voltage
±
V
GS
Gate-source voltage
I
D
Drain current (DC)
I
D
Drain current (DC)
I
DM
Drain current (pulse peak value)
P
tot
Total power dissipation
T
stg
Storage temperature
T
j
Junction temperature
CONDITIONS
-
R
GS
= 20 k
-
T
amb
= 25 C
T
amb
= 100 C
T
amb
= 25 C
T
amb
= 25 C
-
-
MIN.
-
-
-
-
-
-
-
- 55
-
MAX.
60
60
15
3.2
2.0
13
1.8
150
150
UNIT
V
V
V
A
A
A
W
C
C
THERMAL RESISTANCES
SYMBOL
R
th j-sp
R
th j-amb
PARAMETER
From junction to solder point
1
From junction to ambient
CONDITIONS
Mounted on any PCB
Mounted on PCB of fig.18
MIN.
-
-
TYP.
12
-
MAX.
15
70
UNIT
K/W
K/W
4
1
2
3
d
g
s
1
Temperature measured at solder joint on drain tab.
September 1995
1
Rev 1.200
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