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參數資料
| 型號： | CA3162E |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | ADC |
| 英文描述： | A/D Converters for 3-Digit Display |
| 中文描述： | DUAL-SLOPE ADC, PARALLEL ACCESS, PDIP16 |
| 文件頁數： | 1/7頁 |
| 文件大小： | 109K |
| 代理商： | CA3162E |
3-5
August 1997
CA3162, CA3162A
A/D Converters for 3-Digit Display
Features
Dual Slope A/D Conversion
Multiplexed BCD Display
Ultra Stable Internal Band Gap Voltage Reference
Capable of Reading 99mV Below Ground with Single
Supply
Differential Input
Internal Timing - No External Clock Required
Choice of Low Speed (4Hz) or High Speed (96Hz)
Conversion Rate
“Hold” Inhibits Conversion but Maintains Delay
Overrange Indication
- “EEE” for Reading Greater than +999mV, “-” for
Reading More Negative than -99mV When Used With
CA3161E
Extended Temperature Range Version Available
Description
The CA3162E and CA3162AE are I
2
L monolithic A/D
converters that provide a 3 digit multiplexed BCD output.
They are used with the CA3161E BCD-to-Seven-Segment
Decoder/Driver and a minimum of external parts to imple-
ment a complete 3-digit display. The CA3162AE is identical
to the CA3162E except for an extended operating tempera-
ture range.
The CA3161E is described in the Display Drivers section of
this data book.
Pinout
CA3162
(PDIP)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CA3162E
0 to 70
16 Ld PDIP
E16.3
CA3162AE
-40 to 85
16 Ld PDIP
E16.3
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
2
1
2
0
NSD
MSD
LSD
HOLD/
BYPASS
ZERO ADJ
GND
2
3
V+
GAIN ADJ
INTEGRATING
CAP
HIGH INPUT
LOW INPUT
ZERO ADJ
2
2
BCD
OUTPUTS
DIGIT
SELECT
OUTPUTS
BCD
OUTPUTS
File Number
1080.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
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