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參數(shù)資料
型號: CA3262AM
廠商: INTERSIL CORP
元件分類: 外設(shè)及接口
英文描述: Quad-Gated, Inverting Power Drivers
中文描述: 1.2 A 4 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO24
封裝: PLASTIC, MS-013AD, SOIC-24
文件頁數(shù): 1/9頁
文件大小: 72K
代理商: CA3262AM
1
August 1997
CA3262A, CA3262
Quad-Gated, Inverting Power Drivers
Features
Independent Over-Current Limiting On Each Output
Independent Over-Temperature Limiting On Each Output
Output Drivers Capable of Switching 700mA Load
Inputs Compatible With TTL or 5V CMOS Logic
Suitable For Resistive, Lamp or Inductive Loads
Power-Frame Package Construction For Good Heat
Dissipation
Operating Temperature Ranges
- CA3262A . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 125
o
C
- CA3262 . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Applications
System Applications
Solenoids
Relays
Lamps
Steppers
Small Motors
Displays
Automotive
Appliances
Industrial Controls
Robotics
Description
The CA3262 and CA3262A are used to interface low-level
logic to high current loads. Each Power Driver has four
inverting switches consisting of a non-inverting logic input
stage and an inverting low-side driver output stage. All inputs
are 5V TTL/CMOS logic compatible and have a common
Enable input. Each output device has independent current
limiting (I
LIM
) and thermal limiting (T
LIM
) for protection from
over-load conditions. Steering diodes connected from each
output (in pairs) to the Clamp pins may be used in
conjunction with external zener diodes to protect the IC
against over-voltage transients that result from inductive load
switching.
To allow for maximum heat transfer from the chip, all ground
pins on the DIP, PLCC and SOIC packages are directly
connected to the mounting pad of the chip. Integral heat
spreading lead frames directly connect the bond pads and
ground leads to conduct heat from the chip junction to the
PC Board for good heat dissipation.
The CA3262 and CA3262A can drive four incandescent
lamp loads without modulating their brilliance when the
“cold” lamps are energized. Outputs may be parallel
connected to drive high current loads. The maximum output
current of each output is determined by the over-current lim-
iting threshold which is typically 1.2A but may be as low as
0.7A.
Pinouts
CA3262, CA3262A (PDIP)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CA3262E
-40 to 85
16 Ld PDIP
E16.3
CA3262AE
-40 to 125
16 Ld PDIP
E16.3
CA3262AQ
-40 to 125
28 Ld PLCC
N28.45
CA3262AM
-40 to 125
24 Ld SOIC (W)
M24.3
CA3262A (PLCC)
TOP VIEW
CA3262A (SOIC)
TOP VIEW
PRELIMINARY
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
OUT A
CLAMP
OUT B
GND
GND
OUT C
CLAMP
OUT D
IN A
IN B
ENABLE
GND
GND
V
CC
IN C
IN D
INDEX
O
N
I
I
V
C
O
C
O
N
1
I
28
I
27
E
O
C
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18
19
20
21
22
23
24
25
26
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
OUT A
CLAMP
OUT B
NC
GND
GND
GND
GND
NC
OUT C
CLAMP
OUT D
IN A
ENABLE
NC
GND
GND
GND
V
CC
IN C
IN D
IN B
GND
NC
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
File Number
1836.6
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