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參數資料
| 型號： | CA3310E |
| 廠商： | INTERSIL CORP |
| 元件分類： | ADC |
| 英文描述： | CMOS, 10-Bit, A/D Converters with Internal Track and Hold |
| 中文描述： | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP24 |
| 封裝： | PLASTIC, MS-011AA, DIP-24 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 120K |
| 代理商： | CA3310E |
6-6
August 1997
CA3310, CA3310A
CMOS, 10-Bit, A/D Converters
with Internal Track and Hold
Features
CMOS Low Power (Typ). . . . . . . . . . . . . . . . . . . . .15mW
Single Supply Voltage . . . . . . . . . . . . . . . . . . . .3V to 6V
Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
μ
s
Built-In Track and Hold
Rail-to-Rail Input Range
Latched Three-state Output Drivers
Microprocessor-Compatible Control Lines
Internal or External Clock
Applications
Fast, No-Droop, Sample and Hold
Voice Grade Digital Audio
DSP Modems
Remote Low Power Data Acquisition Systems
μ
P Controlled Systems
Description
The Intersil CA3310 is a fast, low power, 10-bit successive
approximation analog-to-digital converter, with microprocessor-
compatible outputs. It uses only a single 3V to 6V supply and
typically draws just 3mA when operating at 5V. It can accept full
rail-to-rail input signals, and features a built-in track and hold.
The track and hold will follow high bandwidth input signals, as it
has only a 100ns (typical) input time constant.
The ten data outputs feature full high-speed CMOS three-
state bus driver capability, and are latched and held through
a full conversion cycle. Separate 8 MSB and 2 LSB enables,
a data ready flag, and conversion start and ready reset
inputs complete the microprocessor interface.
An internal, adjustable clock is provided and is available as
an output. The clock may also be driven from an external
source.
Pinout
CA3310, CA3310A
(PDIP, SBDIP, SOIC)
TOP VIEW
Ordering Information
PART
NUMBER
LINEARITY
(INL, DNL)
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CA3310E
±
0.75 LSB
-40 to 85
24 Ld PDIP
E24.6
CA3310AE
±
0.5 LSB
-40 to 85
24 Ld PDIP
E24.6
CA3310M
±
0.75 LSB
-40 to 85
24 Ld SOIC
M24.3
CA3310AM
±
0.5 LSB
-40 to 85
24 Ld SOIC
M24.3
CA3310D
±
0.75 LSB
-55 to 125
24 Ld SBDIP
D24.6
CA3310AD
±
0.5 LSB
-55 to 125
24 Ld SBDIP
D24.6
1
2
3
4
5
6
7
8
9
10
11
12
D0 (LSB)
D1
D2
D3
D4
D5
D6
D7
D8
D9 (MSB)
DRDY
V
SS
(GND)
16
17
18
19
20
21
22
23
24
15
14
13
V
DD
V
IN
V
REF
+
R
EXT
CLK
STRT
V
AA
+
V
AA
-
OEL
OEM
DRST
V
REF
-
File Number
3095.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
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