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參數資料
| 型號： | CA3338M |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | DAC |
| 英文描述： | CMOS Video Speed, 8-Bit, 50 MSPS, R2R D/A Converters |
| 中文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.02 us SETTLING TIME, 8-BIT DAC, PDSO16 |
| 文件頁數： | 1/7頁 |
| 文件大?。?/td> | 59K |
| 代理商： | CA3338M |
10-11
August 1997
CA3338, CA3338A
CMOS Video Speed, 8-Bit,
50 MSPS, R2R D/A Converters
Features
CMOS/SOS Low Power
R2R Output, Segmented for Low “Glitch”
CMOS/TTL Compatible Inputs
Fast Settling: (Typ) to
1
/
2
LSB . . . . . . . . . . . . . . . .20ns
Feedthrough Latch for Clocked or Unclocked Use
Accuracy (Typ). . . . . . . . . . . . . . . . . . . . . . . . .
±
0.5 LSB
Data Complement Control
High Update Rate (Typ) . . . . . . . . . . . . . . . . . . . . 50MHz
Unipolar or Bipolar Operation
Applications
TV/Video Display
High Speed Oscilloscope Display
Digital Waveform Generator
Direct Digital Synthesis
Description
The CA3338 family are CMOS/SOS high speed R2R voltage
output digital-to-analog converters. They can operate from a
single +5V supply, at video speeds, and can produce
“rail-to-rail” output swings. Internal level shifters and a pin for
an optional second supply provide for an output range below
digital ground. The data complement control allows the inver-
sion of input data while the latch enable control provides
either feedthrough or latched operation. Both ends of the
R2R ladder network are available externally and may be
modulated for gain or offset adjustments. In addition, “glitch”
energy has been kept very low by segmenting and thermom-
eter encoding of the upper 3 bits.
The CA3338 is manufactured on a sapphire substrate to give
low dynamic power dissipation, low output capacitance, and
inherent latch-up resistance.
Pinout
CA3338, CA3338A
(PDIP, SBDIP, SOIC)
TOP VIEW
Ordering Information
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
D7
D6
D5
D4
D3
D2
V
SS
D1
V
DD
COMP
V
REF
+
V
OUT
V
REF
-
V
EE
D0
LE
PART
NUMBER
LINEARITY
(INL, DNL)
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CA3338E
±
1.0 LSB
-40 to 85
16 Ld PDIP
E16.3
CA3338AE
±
0.75 LSB
-40 to 85
16 Ld PDIP
E16.3
CA3338D
±
1.0 LSB
-55 to 125
16 Ld SBDIP
D16.3
CA3338AD
±
0.75 LSB
-55 to 125
16 Ld SBDIP
D16.3
CA3338M
±
1.0 LSB
-40 to 85
16 Ld SOIC
M16.3
CA3338AM
±
0.75 LSB
-40 to 85
16 Ld SOIC
M16.3
File Number
1850.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
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