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參數(shù)資料
| 型號(hào)： | CAT1024RD2I-45 |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, DSO8 |
| 封裝： | 3 X 4.90 MM, 0.80 MM HEIGHT, MO-229, TDFN-8 |
| 文件頁(yè)數(shù)： | 1/17頁(yè) |
| 文件大小： | 100K |
| 代理商： | CAT1024RD2I-45 |
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MR
VCC
NC
SCL
SDA
RESET
NC
VSS
CAT1024
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CAT1024, CAT1025
Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset
FEATURES
s Precision power supply voltage monitor
— 5V, 3.3V and 3V systems
— Five threshold voltage options
s Active high or low reset
— Valid reset guaranteed at V
CC = 1V
s 400kHz I2C bus
s 2.7V to 5.5V operation
s Low power CMOS technology
s 16-Byte page write buffer
s Built-in inadvertent write protection
— WP pin (CAT1025)
s 1,000,000 Program/Erase cycles
s Manual reset input
s 100 year data retention
s 8-pin DIP, SOIC, TSSOP, MSOP & TDFN
(3x4.9mm & 3x3mm foot print) packages
s Industrial and extended temperature ranges
PIN CONFIGURATION
2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
DESCRIPTION
The CAT1024 and CAT1025 are complete memory and
supervisory solutions for microcontroller-based systems.
A 2k-bit serial EEPROM memory and a system power
supervisor with brown-out protection are integrated
together in low power CMOS technology. Memory
interface is via a 400kHz I2C bus.
The CAT1025 provides a precision VCC sense circuit
and two open drain outputs: one (RESET) drives high
and the other (
RESET) drives low whenever VCC falls
below the reset threshold voltage. The CAT1025 also
has a Write Protect input (WP). Write operations are
disabled if WP is connected to a logic high.
The CAT1024 also provides a precision VCC sense
circuit, but has only a
RESET output and does not have
a Write Protect input.
The power supply monitor and reset circuit protect
memory and system controllers during power up/down
and against brownout conditions. Five reset threshold
Doc No. 3008, Rev. J
voltages support 5V, 3.3V and 3V systems. If power supply
voltages are out of tolerance reset signals become active,
preventing the system microcontroller, ASIC or peripherals
from operating. Reset signals become inactive typically 200
ms after the supply voltage exceeds the reset threshold
level. With both active high and low reset signals, interface
to microcontrollers and other ICs is simple. In addition, the
RESET pin or a separate input, MR, can be used as an input
for push-button manual reset capability.
The CAT1024/25 memory features a 16-byte page. In
addition, hardware data protection is provided by a VCC
sense circuit that prevents writes to memory whenever VCC
falls below the reset threshold or until VCC reaches the reset
threshold during power up.
Available packages include an 8-pin DIP and a surface
mount 8-pin SO, 8-pin TSSOP, 8-pin TDFN and 8-pin MSOP
packages. The TDFN package thickness is 0.8mm maximum.
TDFN footprint options are 3x3mm or 3x4.9mm (MSOP pad
layout).
Preliminary Information
MR
VCC
SCL
SDA
RESET
VSS
CAT1025
1
2
3
4
8
7
6
5
VCC
WP
RESET
(Bottom View)
TDFN Package: 3mm x 4.9mm
0.8mm maximum height - (RD2, ZD2)
1
2
3
4
8
7
6
5
CAT1025
VCC
WP
SCL
SDA
MR
RESET
VSS
1
2
3
4
8
7
6
5
VCC
NC
SCL
SDA
MR
RESET
NC
VSS
CAT1024
(Bottom View)
TDFN Package: 3mm x 3mm
0.8mm maximum height - (RD4, ZD4)
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2
3
4
8
7
6
5
VCC
NC
SCL
SDA
MR
RESET
NC
VSS
CAT1024
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
MR
RESET
VSS
CAT1025
HA
LOGEN FREE
TM
LEAD FREE
DIP Package (P, L)
SOIC Package (S, V)
TSSOP Package (U, Y)
MSOP Package (R, Z)
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