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參數(shù)資料
型號(hào): CAT1232LPW-T13
英文描述: 5V and 3.3V Supply Voltage Monitor and Reset Circuit
中文描述: 5V和3.3V電源電壓監(jiān)控和復(fù)位電路
文件頁(yè)數(shù): 1/9頁(yè)
文件大小: 117K
代理商: CAT1232LPW-T13
2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
5V and 3.3V Supply Voltage Monitor and Reset Circuit
Doc. No. 25089, Rev. A
CAT1232LP/CAT1832
FEATURES
I
Selectable reset voltage tolerance
— CAT1232LP for 5V supply
— CAT1832 for 3.3V supply
I
Selectable watchdog period:
150ms, 600ms or 1.2 sec
I
Two reset outputs
— Active high, push-pull reset output
— Active low, open-drain reset output
(CAT1232LP)
— Active low, push-pull reset output (CAT1832)
I
Debounced manual push-button reset
I
Compact SOIC and MSOP packages
DESCRIPTION
The CAT1232LP and CAT1832 microprocessor
supervisors can halt and restart a “hung-up” or “stalled”
microprocessor, restart a microprocessor after a power
failure, and debounce a manual/push-button micro-
processor reset switch. The devices are drop in
replacements for the Maxim/Dallas Semiconductor
DS1232LP and DS1832 supervisors
Precision reference and comparator circuits monitor the
5V or 3.3V system power supply voltage, V
CC
. During
power-up or when the power supply falls outside
selectable tolerance limits, both the RESET and
RESET
become active. After the power supply voltage rises
above the RESET threshold voltage, the reset signals
remain active for a minimum of 250ms, allowing the
power supply and system processor to stabilize. The
trip-point tolerance input, TOL, selects the trip level
tolerance to be either 5% or 10% for the CAT1232LP 5V
supply and 10% or 20% for the CAT1832 3.3V supply.
Each device has a push-pull, active HIGH reset output.
The CAT1232LP also has an open drain, active LOW
reset output while the CAT1832 also has a push-pull,
active LOW reset output.
A debounced manual reset input activates the reset
outputs and holds them active for a minimum period of
250ms after being released.
Also included is a watchdog timer to reset a
microprocessor that has stopped due to a software or
hardware failure. Three watchdog time-out periods are
selectable: 150ms, 600ms and 1.2sec. If the
ST
input is
not strobed low before the watchdog time out period
expires, the reset signals become active for a minimum
of 250ms.
APPLICATIONS
I
Microprocessor Systems
I
Portable Equipment
I
Controllers
I
Single Board Computers
I
Instrumentations
I
Telecommunications
FUNCTIONAL DIAGRAM
ST
RESET
PBRST
40k
TOL
V
CC
+
Reference
VCC
RESET
TD
Push Button Debounce
Watchdog Timebase Selection
Reset &
Watchdog Timer
(CAT1232LP)
Watchdog Transition Detector
RESET
(CAT1832)
Tolerance Selection
相關(guān)PDF資料
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