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參數資料

CD-700, VCXO Based PLL

Vectron International

166 Glover Avenue, Norwalk, CT 06856 Tel: 1-88-VECTRON-1 http://www.vectron.com

Layout Considerations

To achieve stable, low noise performance good analog layout techniques should be incorporated and a

partial list is shown below.

The CD-700 should be treated more like an analog device and the power supply must be well decoupled

with a good quality RF 0.01 uF capacitor in parallel with a 0.1 uF capacitor, located as close to pin 14 as

possible and connected to ground. In some cases, a

Π filter such as a large capacitor (10uF) to ground, a

series ferrite bead or inductor with 0.01 uF and 100 pF capacitor to ground to decouple the device supply.

The traces for the OUT1, OUT2, RCLK and RDATA ouputs should be kept as short as possible. It is

common practice to use a series resistor ( 50 to 100 ohms ) in order to reduce reflections if these traces

are more than a couple of inches long. Also OUT1, OUT2, RCLK and RDATA should not be routed

directly underneath the device.

The op-amp loop filter components should be kept as close to the device as possible and the feedback

capacitor should be located close to the op-amp input terminal. The loop filter capacitor(s) should be low

leakage (polarized capacitors are allowed).

Unused outputs should be left floating and it is not required to load or terminate them (such as an ECL or

PECL output). Loading unused outputs will only increase current consumption.

相關代理商/技術參數	參數描述
CD-700-KAC-HDB-34.368	制造商:未知廠家制造商全稱:未知廠家功能描述:Phase-Locked Loop
CD-700-KAC-HDB-35.328	制造商:未知廠家制造商全稱:未知廠家功能描述:Phase-Locked Loop
CD-700-KAC-HDB-38.880	制造商:未知廠家制造商全稱:未知廠家功能描述:Phase-Locked Loop
CD-700-KAC-HDB-39.3216	制造商:未知廠家制造商全稱:未知廠家功能描述:Phase-Locked Loop
CD-700-KAC-HDB-40.000	制造商:未知廠家制造商全稱:未知廠家功能描述:Phase-Locked Loop

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