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參數資料
型號: CD-700KACNFB-19.440
廠商: VECTRON INTERNATIONAL
元件分類: XO, clock
英文描述: PHASE LOCKED LOOP, CQCC16
封裝: HERMETIC SEALED, CERAMIC, SMD-16
文件頁數: 11/14頁
文件大小: 146K
代理商: CD-700KACNFB-19.440
CD-700, VCXO Based PLL
Vectron International
166 Glover Avenue, Norwalk, CT 06856 Tel: 1-88-VECTRON-1 http://www.vectron.com
VCXO and Absolute Pull Range (APR) Specification
The CD-700’s VCXO is a varactor tuned crystal oscillator, which produces an output frequency
proportional to the control voltage (pin 16). The frequency deviation of the CD-700 VCXO is specified in
terms of Absolute Pull Range (APR). APR provides the user with a guaranteed specification for minimum
available frequency deviation over all operating conditions. Operating conditions include power supply
variation, operating temperature range, and differences in output loading and changes due to aging.
A CD-700 VCXO with an APR of +/-50 ppm will track a +/-50 ppm reference source over all
operating conditions. The fourth character of the product code in Table 7 specifies absolute Pull
Range (APR). Please see Vectron’s web site (www.vectron.com) for the APR Application Note.
APR is tested at 0.5 and 4.5 volts for the 5.0 volt option and 0.3 and 3.0 volts for the 3.3 volt option.
VCXO Aging
Quartz oscillators typically exhibit a part per million shift in output frequency during aging. The major
factors, which lead to this shift, are changes in the mechanical stress on the crystal and mass-loading on
the crystal.
As the oscillator ages, relaxation of the crystal mounting stress or transfer of environmental stress through
the package to the crystal mounting arrangement can lead to frequency variations. VI has minimized these
two effects through the use of a miniature AT-cut strip resonator crystal which allows a superior mounting
arrangement. This results in minimal relaxation and almost negligible environmental stress transfer.
VI has eliminated the impact of mass loading by ensuring hermetic integrity and minimizing out-gassing by
limiting the number of internal components through the use of ASIC technology. Mass-loading on the
crystal generally results in a frequency decrease and is typically due to out-gassing of material within a
hermetic package or from contamination by external material in a non-hermetic package.
Under normal operating conditions the CD-700 will typically exhibit 2 ppm aging in the first year of
operation. The device will then typically exhibit 1 ppm aging the following year with a logarithmic decline
each year thereafter.
Frequency Divider Feature
The lowest available VCXO OUT1 frequency is 12.000 MHz. To achieve lower frequencies, OUT1 is
divided by a 2
n counter (n = 1 to 8) and is the OUT2 frequency. The divider values (2, 4, 8, 16, 32, 64, 128
and 256) are set at the factory, so it is user selectable upon ordering only. In addition, a disabled OUT2
option is also available. To achieve 1.544 MHz, a CD-700 with OUT1 frequency equal to 24.704 MHz
and a divider value equal to 16 would be used. Additional external divider circuits can be used to further
lower or change the frequency.
相關PDF資料
PDF描述
CD-700KACNKB-30.720 PHASE LOCKED LOOP, CQCC16
CD-700KAFGAB-62.208 PHASE LOCKED LOOP, CQCC16
CD-700KAFGKB-30.000 PHASE LOCKED LOOP, CQCC16
CD-700KAFGKB-61.440 PHASE LOCKED LOOP, CQCC16
CD-700KAFHAB-32.000 PHASE LOCKED LOOP, CQCC16
相關代理商/技術參數
參數描述
CD-700-KAC-NFB-20.000 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Phase-Locked Loop
CD-700-KAC-NFB-20.480 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Phase-Locked Loop
CD-700-KAC-NFB-24.576 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Phase-Locked Loop
CD-700-KAC-NFB-24.704 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Phase-Locked Loop
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