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參數資料
| 型號： | CD4008BMS |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS 4-Bit Full Adder With Parallel Carry Out(CMOS 4位 并行輸出加法器) |
| 中文描述： | 的CMOS 4位全加器與平行開展（的CMOS 4位并行輸出加法器） |
| 文件頁數： | 1/8頁 |
| 文件大小： | 67K |
| 代理商： | CD4008BMS |
7-675
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
CD4008BMS
CMOS 4-Bit Full Adder With
Parallel Carry Out
Pinout
CD4008BMS
TOP VIEW
Logic Diagram
TRUTH TABLE
A
i
B
i
C
i
C
O
SUM
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
0
0
1
0
1
1
1
0
1
1
0
1
0
0
1
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
A4
B3
A3
B2
A2
B1
VSS
A1
VDD
CO
S4
S3
S2
S1
C1
B4
SUM
SUM
SUM
SUM
HIGH SPEED
PAR CARRY
(CARRY-OUT)
*
*
*
*
*
*
*
*
*
15
1
2
3
4
5
6
7
9
B4
A4
B3
A3
B2
A2
B1
A1
C1
CO
S4
S3
S2
S1
14
13
12
11
10
(CARRY-IN)
C4
C3
C2
VDD
VSS
VDD = 16
VSS = 8
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
Features
High-Voltage Type (20V Rating)
4 Sum Outputs Plus Parallel Look-ahead Carry-Output
High-Speed Operation - Sum In-To-Sum Out, 160ns
Typ; Carry In-To-Carry Out, 5ns Typ. At VDD = 10V,
CL=50pF
Standardized Symmetrical Output Characteristics
100% Tested For Quiescent Current At 20V
Maximum Input Current of 1
μ
a at 18V Over Full Pack-
age-Temperature Range;
- 100nA at 18V and 25
o
C
Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
5V, 10V and 15V Parametric Ratings
Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
Binary Addition/Arithmetic Units
Description
CD4008BMS types consist of four full adder stages with fast
look ahead carry provision from stage to stage. Circuitry is
included to provide a fast “parallel-carry-out” but to permit
high-speed operation in arithmetic sections using several
CD4008BMS’s.
CD4008BMS inputs include the four sets of bits to be added,
A1 to A4 and B1 to B4, in addition to the “Carry In” bit from a
previous section. CD4008BMS outputs include the four sum
bits, S1 to S4. In addition to the high speed “parallel-carry-
out” which may be utilized at a succeeding CD4008BMS
section.
The CD4008BMS is supplied in these 16-lead outline pack-
ages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack H6W
H4T
H1F
November 1994
File Number
3292
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