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參數(shù)資料
型號(hào): CD4049UBCJ
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Hex Inverting,Non-Inverting Buffer
中文描述: 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP16
封裝: CERAMIC, DIP-16
文件頁數(shù): 1/18頁
文件大小: 442K
代理商: CD4049UBCJ
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright
2004, Texas Instruments Incorporated
Data sheet acquired from Harris Semiconductor
SCHS046I
CD4049UB, CD4050B
CMOS Hex Buffer/Converters
The CD4049UB and CD4050B devices are inverting and
non-inverting hex buffers, respectively, and feature logic-
level conversion using only one supply voltage (V
CC
). The
input-signal high level (V
IH
) can exceed the V
CC
supply
voltage when these devices are used for logic-level
conversions. These devices are intended for use as CMOS
to DTL/TTL converters and can drive directly two DTL/TTL
loads. (V
CC
= 5V, V
OL
0.4V, and I
OL
3.3mA.)
The CD4049UB and CD4050B are designated as
replacements for CD4009UB and CD4010B, respectively.
Because the CD4049UB and CD4050B require only one
power supply, they are preferred over the CD4009UB and
CD4010B and should be used in place of the CD4009UB
and CD4010B in all inverter, current driver, or logic-level
conversion applications. In these applications the
CD4049UB and CD4050B are pin compatible with the
CD4009UB and CD4010B respectively, and can be
substituted for these devices in existing as well as in new
designs. Terminal No. 16 is not connected internally on the
CD4049UB or CD4050B, therefore, connection to this
terminal is of no consequence to circuit operation. For
applications not requiring high sink-current or voltage
conversion, the CD4069UB Hex Inverter is recommended.
Features
CD4049UB Inverting
CD4050B Non-Inverting
High Sink Current for Driving 2 TTL Loads
High-To-Low Level Logic Conversion
100% Tested for Quiescent Current at 20V
Maximum Input Current of 1
μ
A at 18V Over Full Package
Temperature Range; 100nA at 18V and 25
o
C
5V, 10V and 15V Parametric Ratings
Applications
CMOS to DTL/TTL Hex Converter
CMOS Current “Sink” or “Source” Driver
CMOS High-To-Low Logic Level Converter
Pinouts
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
CD4049UBF3A
-55 to 125
16 Ld CERDIP
CD4050BF3A
-55 to 125
16 Ld CERDIP
CD4049UBD
-55 to 125
16 Ld SOIC
CD4049UBDR
-55 to 125
16 Ld SOIC
CD4049UBDT
-55 to 125
16 Ld SOIC
CD4049UBDW
-55 to 125
16 Ld SOIC
CD4049UBDWR
-55 to 125
16 Ld SOIC
CD4049UBE
-55 to 125
16 Ld PDIP
CD4049UBNSR
-55 to 125
16 Ld SOP
CD4049UBPW
-55 to 125
16 Ld TSSOP
CD4049UBPWR
-55 to 125
16 Ld TSSOP
CD4050BD
-55 to 125
16 Ld SOIC
CD4050BDR
-55 to 125
16 Ld SOIC
CD4050UBDT
-55 to 125
16 Ld SOIC
CD4050BDW
-55 to 125
16 Ld SOIC
CD4050BDWR
-55 to 125
16 Ld SOIC
CD4050BE
-55 to 125
16 Ld PDIP
CD4050NSR
-55 to 125
16 Ld SOP
CD4050BPW
-55 to 125
16 Ld TSSOP
CD4050BPWR
-55 to 125
16 Ld TSSOP
NOTE: When ordering, use the entire part number. The suffix R denotes tape
and reel. The suffix T denotes a small-quantity reel of 250.
CD4049UB (PDIP, CERDIP, SOIC, SOP, TSSOP)
TOP VIEW
CD4050B (PDIP, CERDIP, SOIC, SOP)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
V
CC
G = A
A
H = B
B
I = C
V
SS
C
NC
F
NC
K = E
E
J = D
D
L = F
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
V
CC
G = A
A
H = B
B
I = C
V
SS
C
NC
F
NC
K = E
E
J = D
D
L = F
August 1998 - Revised May 2004
[ /Title
(CD40
49UB,
CD405
0B)
/Sub-
ject
(CMO
S Hex
Buffer/
Con-
verters)
/Autho
r ()
/Key-
words
(Harris
Semi-
con-
ductor,
CD400
0,
metal
gate,
CMOS
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