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參數資料
| 型號： | CD4516BC |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | BCD-to-7 Segment Latch/Decoder/Driver |
| 中文描述： | BCD碼至7段鎖存器/解碼器/驅動器 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 145K |
| 代理商： | CD4516BC |
TL/F/5991
C
February 1988
CD4511BM/CD4511BC BCD-to-7 Segment
Latch/Decoder/Driver
General Description
The CD4511BM/CD4511BC BCD-to-seven segment latch/
decoder/driver is constructed with complementary MOS
(CMOS) enhancement mode devices and NPN bipolar out-
put drivers in a single monolithic structure. The circuit pro-
vides the functions of a 4-bit storage latch, an 8421 BCD-to-
seven segment decoder, and an output drive capability.
Lamp test (LT), blanking (BI), and latch enable (LE) inputs
are used to test the display, to turn-off or pulse modulate
the brightness of the display, and to store a BCD code,
respectively. It can be used with seven-segment light emit-
ting diodes (LED), incandescent, fluorescent, gas discharge,
or liquid crystal readouts either directly or indirectly.
Applications include instrument (e.g., counter, DVM, etc.)
display driver, computer/calculator display driver, cockpit
display driver, and various clock, watch, and timer uses.
Features
Y
Low logic circuit power dissipation
Y
High current sourcing outputs (up to 25 mA)
Y
Latch storage of code
Y
Blanking input
Y
Lamp test provision
Y
Readout blanking on all illegal input combinations
Y
Lamp intensity modulation capability
Y
Time share (multiplexing) facility
Y
Equivalent to Motorola MC14511
Connection Diagram
Dual-In-Line Package
TL/F/5991–1
Top View
Order Number CD4511B
Segment Identification
TL/F/5991–3
Truth Table
Inputs
Outputs
LE BI LT D C B A a b c d e
f
g Display
X
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
X
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
X
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
X
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
X
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
X 1 1 1 1 1 1 1
X 0 0 0 0 0 0 0
0
1 1 1 1 1 1 0
1
0 1 1 0 0 0 0
0
1 1 0 1 1 0 1
1
1 1 1 1 0 0 1
0
0 1 1 0 0 1 1
1
1 0 1 1 0 1 1
0
0 0 1 1 1 1 1
1
1 1 1 0 0 0 0
0
1 1 1 1 1 1 1
1
1 1 1 0 0 1 1
0
0 0 0 0 0 0 0
1
0 0 0 0 0 0 0
0
0 0 0 0 0 0 0
1
0 0 0 0 0 0 0
0
0 0 0 0 0 0 0
1
0 0 0 0 0 0 0
X
B
0
1
2
3
4
5
6
7
8
9
*
*
X
e
Don’t Care
*
Depends upon the BCD code applied during the 0 to 1 transition of LE.
Display
TL/F/5991–2
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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