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參數資料
| 型號： | CD4555 |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS Dual Binary to 1 of 4 Decoder/Demultiplexers |
| 中文描述： | CMOS雙二元至4解碼器1 /解復用器 |
| 文件頁數： | 1/11頁 |
| 文件大小： | 96K |
| 代理商： | CD4555 |
7-1249
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
CD4555BMS
CD4556BMS
CMOS Dual Binary to 1 of 4
Decoder/Demultiplexers
Pinouts
CD4556BMS
TOP VIEW
CD4555BMS
TOP VIEW
Functional Diagrams
CD4555BMS
CD4556BMS
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
E
A
B
Q0
Q1
Q2
VSS
Q3
VDD
A
B
Q0
Q1
Q2
Q3
E
1/2 OF DUAL
1/2 OF DUAL
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
E
A
B
Q0
Q1
Q2
VSS
Q3
VDD
A
B
Q0
Q1
Q2
Q3
E
1/2 OF DUAL
1/2 OF DUAL
2
3
1
14
13
15
A
B
E
4
5
6
7
12
11
10
9
Q0
Q1
Q2
Q3
A
B
E
Q0
Q1
Q2
Q3
16
8
VSS
VDD
2
3
1
14
13
15
A
B
E
4
5
6
7
12
11
10
9
Q0
Q1
Q2
Q3
A
B
E
Q0
Q1
Q2
Q3
16
8
VSS
VDD
Features
High Voltage Type (20V Rating)
CD4555BMS: Outputs High on Select
CD4556BMS: Outputs Low on Select
Expandable with Multiple Packages
100% Tested for Quiescent Current at 20V
Standardized, Symmetrical Output Characteristics
Maximum Input Current of 1
μ
A at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25
o
C
Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
5V, 10V and 15V Parametric Ratings
Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
Decoding
Code Conversion
Demultiplexing (Using Enable Input as a Data Input
Memory Chip-Enable Selection
Function Selection
Description
CD4555BMS and CD4556BMS are dual one-of-four decod-
ers/demultiplexers. Each decoder has two select inputs (A
and B), an Enable input (E), and four mutually exclusive out-
puts. On the CD4555BMS the outputs are high on select; on
the CD4556BMS the outputs are low on select.
When the Enable input is high, the outputs of the
CD4555BMS remain low and the outputs of the
CD4556BMS remain high regardless of the state of the
select inputs A and B. The CD4555BMS and CD4556BMS
are similar to types MC14555 and MC14556, respectively.
The CD4555BMS and CD4556BMS are supplied in these
16-lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
*CD4555B Only
*H46
H1E
H6W
CD4556B Only
H4T
File Number
3346
December 1992
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PDF描述 |
|---|---|
| CD4556 | CMOS Dual Binary to 1 of 4 Decoder/Demultiplexers |
| CD4556BMS | CMOS Dual Binary to 1 of 4 Decoder/Demultiplexers(CMOS 雙路十進制4選1譯碼器/多路分解器) |
| CD4585BMS | CMOS 4-Bit Magnitude Comparator |
| cd4585bm | 4-Bit Magnitude Comparator(CMOS4位數值比較器) |
| CD4723BC | Dual 4-Bit, 8-Bit Addressable Latch |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CD4555B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:CMOS DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXERS |
| CD4555BD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| CD4555BD3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CD4555BDMSR | 制造商:Intersil Corporation 功能描述:DECODER/DEMLTPLXR DUAL 2-TO-4 16PIN SBDIP - Rail/Tube |
| CD4555BE | 功能描述:編碼器、解碼器、復用器和解復用器 Dual Binary 1-of-4 RoHS:否 制造商:Micrel 產品:Multiplexers 邏輯系列:CMOS 位數: 線路數量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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