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參數資料
| 型號： | CD54HC670F3A |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | High-Speed CMOS Logic 4x4 Register File |
| 中文描述： | 高速CMOS邏輯4 × 4寄存器文件 |
| 文件頁數： | 1/14頁 |
| 文件大小： | 284K |
| 代理商： | CD54HC670F3A |
1
Data sheet acquired from Harris Semiconductor
SCHS195C
Features
Simultaneous and Independent Read and Write
Operations
Expandable to 512 Words of n-Bits
Three-State Outputs
Organized as 4 Words x 4 Bits Wide
Buffered Inputs
Typical Read Time = 16ns for ’HC670 V
CC
= 5V, C
L
=
15pF, T
A
= 25
o
C
Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤
1
μ
A at V
OL
, V
OH
Description
The ’HC670 and CD74HCT670 are 16-bit register files
organized as 4 words x 4 bits each. Read and write address
and enable inputs allow simultaneous writing into one location
while reading another. Four data inputs are provided to store
the 4-bit word. The write address inputs (WA0 and WA1)
determine the location of the stored word in the register.
When write enable (WE) is low the word is entered into the
address location and it remains transparent to the data. The
outputs will reflect the true form of the input data. When (WE)
is high data and address inputs are inhibited. Data acquisition
from the four registers is made possible by the read address
inputs (RA1 and RA0). The addressed word appears at the
output when the read enable (RE) is low. The output is in the
high impedance state when the (RE) is high. Outputs can be
tied together to increase the word capacity to 512 x 4 bits.
Ordering Information
Pinout
CD54HC670
(CERDIP)
CD74HC670, CD74HCT670
(PDIP, SOIC)
TOP VIEW
PART NUMBER
TEMP. RANGE
(
o
C)
PACKAGE
CD54HC670F3A
-55 to 125
16 Ld CERDIP
CD74HC670E
-55 to 125
16 Ld PDIP
CD74HC670M
-55 to 125
16 Ld SOIC
CD74HC670MT
-55 to 125
16 Ld SOIC
CD74HC670M96
-55 to 125
16 Ld SOIC
CD74HCT670E
-55 to 125
16 Ld PDIP
CD74HCT670M
-55 to 125
16 Ld SOIC
CD74HCT670MT
-55 to 125
16 Ld SOIC
CD74HCT670M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
D1
D2
D3
RA1
RA0
Q3
GND
Q2
V
CC
WA0
WA1
WE
RE
Q0
Q1
D0
January 1998 - Revised October 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
2003, Texas Instruments Incorporated
CD54HC670, CD74HC670,
CD74HCT670
High-Speed CMOS Logic
4x4 Register File
[ /Title
(CD74H
C670,
CD74H
CT670)
/Subject
(High-
Speed
CMOS
Logic
4x4 Reg-
ister
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