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參數資料
| 型號： | CD54HCT165M96 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register |
| 中文描述： | 高速CMOS邏輯8位Parallel-In/Serial-Out移位寄存器 |
| 文件頁數： | 1/13頁 |
| 文件大小： | 274K |
| 代理商： | CD54HCT165M96 |
1
Data sheet acquired from Harris Semiconductor
SCHS156C
Features
Buffered Inputs
Asynchronous Parallel Load
Complementary Outputs
Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
≤
1
μ
A at V
OL
, V
OH
Pinout
CD54HC165, CD54HCT165
(CERDIP)
CD74HC165, CD74HCT165
(PDIP, SOIC)
TOP VIEW
Description
The ’HC165 and ’HCT165 are 8-bit parallel or serial-in shift
registers with complementary serial outputs (Q
7
and Q
7
)
available from the last stage. When the parallel load (PL)
input is LOW, parallel data from the D0 to D7 inputs are
loaded into the register asynchronously. When the PL is
HIGH, data enters the register serially at the DS input and
shifts one place to the right (Q
0
→
Q
1
→
Q
2
, etc.) with each
positive-going clock transition. This feature allows parallel-
to-serial converter expansion by typing the Q
7
output to the
DS input of the succeeding device.
For predictable operation the LOW-to-HIGH transition of CE
should only take place while CP is HIGH. Also, CP an d CE
should be LOW before the LOW-to-HIGH transition of PL to
prevent shifting the data when PL goes HIGH.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
PL
CP
D4
D5
D6
D7
GND
Q
7
V
CC
D3
D2
D1
D0
DS
Q
7
CE
Ordering Information
PART NUMBER
TEMP. RANGE
(
o
C)
PACKAGE
CD54HC165F3A
-55 to 125
16 Ld CERDIP
CD54HCT165F3A
-55 to 125
16 Ld CERDIP
CD74HC165E
-55 to 125
16 Ld PDIP
CD74HC165M
-55 to 125
16 Ld SOIC
CD74HC165MT
-55 to 125
16 Ld SOIC
CD54HC165M96
-55 to 125
16 Ld SOIC
CD74HCT165E
-55 to 125
16 Ld PDIP
CD74HCT165M
-55 to 125
16 Ld SOIC
CD74HCT165MT
-55 to 125
16 Ld SOIC
CD54HCT165M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
February 1998 - Revised October 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
2003, Texas Instruments Incorporated
CD54HC165, CD74HC165,
CD54HCT165, CD74HCT165
High-Speed CMOS Logic
8-Bit Parallel-In/Serial-Out Shift Register
[ /Title
(CD74H
C165,
CD74H
CT165)
/Subject
(High
Speed
CMOS
Logic 8-
Bit Par-
allel-
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