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參數資料
型號: CD74HC22106
廠商: Intersil Corporation
英文描述: QMOS 8 x 8 x 1 Crosspoint Switches with Memory Control
中文描述: QMOS 8 × 8 × 1交叉點開關,內存控制
文件頁數: 1/9頁
文件大小: 68K
代理商: CD74HC22106
66
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright Intersil Corporation 1999
CD74HC22106
QMOS 8 x 8 x 1 Crosspoint Switches with
Memory Control
The CD74HC22106 is a digitally controlled analog switch
which utilize silicon-gate CMOS technology. The
CD74HC22106 features CMOS input-voltage-level
compatibility.
The Master Reset has an internal pull-up resistor and is
normally used with a 0.1
μ
F capacitor. During power up all
switches are automatically reset. The crosspoint switches
will reset with MR = 0 even if CE is high. A 6-bit address
through a 6 line to 64 line decoder selects the transmission
gate which can be turned on by applying a logic ONE to the
DATA input and logic ZERO to the STROBE. Similarly, any
transmission gate can be turned OFF by applying a logic
ZERO to the DATA input while strobing the STROBE with a
logic ZERO.
The CE pin allows the crosspoint array to be cascaded for
matrix expansion in both the X and Y directions.
Features
64 Analog Switches in an 8 x 8 x 1 Array
On-Chip Line Decoder and Control Latches
Automatic Power-Up Reset by Using a 0.1
μ
F Capacitor at
the MR Pin
R
ON
Resistanced 95
at V
CC
= 4.5V
Analog Signal Capability: V
DD
/2
Wide Operating Temp. Range: -40
o
C to 85
o
C
2V to 10V Operation
High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
DD
; at
V
DD
= 5V and 10V
Pinout
CD74HC22106
(PDIP)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG. NO.
CD74HC22106E
-40 to 85
28 Ld PDIP
E28.6
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A5
STROBE
CE
DATA
V
SS
X0
X2
X4
X6
MR
Y7
Y6
Y5
Y4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A4
A2
A1
A0
X1
X5
V
DD
Y0
Y1
Y2
Y3
A3
X3
X7
Data Sheet
January 1999
File Number
1719.5
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