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參數資料
型號: CD82C85
廠商: HARRIS SEMICONDUCTOR
元件分類: XO, clock
英文描述: CMOS Static Clock Controller/Generator
中文描述: 24 MHz, PROC SPECIFIC CLOCK GENERATOR, CDIP24
文件頁數: 1/21頁
文件大小: 363K
代理商: CD82C85
297
TM
March 1997
82C85
CMOS Static Clock Controller/Generator
Features
Generates the System Clock For CMOS or NMOS
Microprocessors and Peripherals
Complete Control Over System Operation for Very
Low System Power
- Stop-Oscillator
- Low Frequency
- Stop-Clock
- Full Speed Operation
DC to 25MHz Operation (DC to 8MHz System Clock)
Generates 50% and 33% Duty Cycle Clocks
(Synchronized)
Uses a Parallel Mode Crystal Circuit or External
Frequency Source
TTL Compatible Inputs/Outputs
24 Lead Slimline Dual-In-Line or 28 Pad Square LCC
Package Options
Single 5V Power Supply
Operating Temperature Range
- C82C85 . . . . . . . . . . . . . . . . . . . . . . . . . .0
o
C to +70
o
C
- I82C85 . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to +85
o
C
- M82C85 . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Ordering Information
Pinouts
24 LEAD CERDIP
TOP VIEW
Description
The Intersil 82C85 Static CMOS Clock Controller/Genera-
tor provides complete control of static CMOS system oper-
ating modes and supports full speed, slow, stop-clock and
stop-oscillator operation. While directly compatible with the
Intersil 80C86 and 80C88 16-bit Static CMOS Microproces-
sor Family, the 82C85 can also be used for general system
clock control.
For static system designs, separate signals are provided
on the 82C85 for stop (S0, S1, S2/STOP) and start
(START) control of the crystal oscillator and system clocks.
A single control line (SLO/FST) determines 82C85 fast
(crystal/EFI frequency divided by 3) or slow (crystal/EFI
frequency divided by 768) mode operation. Automatic
maximum mode 80C86 and 80C88 software HALT
instruction decode logic in the 82C85 enables software-
based clock control. Restart logic insures valid clock start-
up and complete synchronization of system clocks.
The 82C85 is manufactured using the Intersil advanced
Scaled SAJI IV CMOS process. In addition to clock control
circuitry, the 82C85 also contains a crystal controlled
oscillator (up to 25MHz), clock generation logic, complete
“Ready” synchronization and reset logic. This permits the
designer to tailor the system power-performance product to
provide optimum performance at low power levels.
28 LEAD PLCC, CLCC
TOP VIEW
C
N
PART NUMBER
CS82C85
IS82C85
CD82C85
ID82C85
MD82C85/B
MR82C85/B
PACKAGE
28 Ld PLCC
TEMP. RANGE
0
o
C to +70
o
C
-40
o
C to +85
o
C
0
o
C to +70
o
C
-40
o
C to +85
o
C
-55
o
C to +125
o
C
-55
o
C to +125
o
C
PKG. NO.
N28.45
N28.45
F24.3
F24.3
F24.3
J28.A
24 Ld CERDIP
28 Pad CLCC
CSYNC
PCLK
AEN1
RDY1
READY
RDY2
AEN2
CLK
GND
CLK50
START
SLO/FST
V
CC
X1
X2
ASYNC
EFI
F/C
OSC
RES
RESET
S2/STOP
S1
S0
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
23
22
21
20
24
25
19
11
3
2
1
4
14 15 16 17 18
N
S
12 13
S
28 27 26
10
5
6
7
8
9
RDY1
READY
RDY2
AEN2
CLK
GND
NC
NC
ASYNC
EFI
F/C
OSC
RES
RESET
C
S
S
S
A
P
V
C
X
X
FN2976.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
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