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參數資料
| 型號： | CDC3244 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V ABT Octal Clock Driver with 3 State Output(3.3VABT八時鐘驅動器(三態輸出)) |
| 中文描述： | 3.3 - 3國輸出V ABT生根粉八路時鐘驅動器（3.3VABT八時鐘驅動器（三態輸出）） |
| 文件頁數： | 1/7頁 |
| 文件大小： | 148K |
| 代理商： | CDC3244 |
CDC3244
3.3-V ABT OCTAL CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS500 – APRIL 1995
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low-Static Power
Dissipation
750-ps Maximum Output Skew Between All
Outputs
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Bus-Hold Data Inputs Eliminate the Need
for External Pullup Resistors
Supports Live Insertion
Packaged in Shrink Small-Outline Package
(SSOP)
description
The CDC3244 is designed specifically for low-voltage 3.3-V V
CC
operation, but with the capability to provide
a TTL interface to a 5-V system environment. The CDC3244 provides a low-cost solution in applications that
require skews of less than 750 ps.
The CDC3244 is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,
the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Active bus-hold circuitry holds unused or floating data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The CDC3244 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count and
functionality of standard small-outline packages in less than half the printed-circuit-board area.
FUNCTION TABLE
(each driver)
INPUTS
OUTPUT
Y
OE
L
A
H
H
L
L
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Copyright
1995, Texas Instruments Incorporated
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
DB PACKAGE
(TOP VIEW)
P
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