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參數(shù)資料
| 型號： | CDCDLP223_07 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3 V Clock Synthesizer for DLP Systems |
| 中文描述： | 3.3伏時鐘合成器的投影系統(tǒng) |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 189K |
| 代理商： | CDCDLP223_07 |
www.ti.com
FEATURES
High-Performance Clock Synthesizer
Uses a 20 MHz Crystal Input to Generate
Multiple Output Frequencies
Integrated Load Capacitance for 20 MHz
Oscillator Reducing System Cost
All PLL Loop Filter Components are
Integrated
Generates the Following Clocks:
–
REF CLK 20 MHz (Buffered)
–
XCG CLK 100 MHz With SSC
–
DMD CLK 200-400 MHz With Selectable
SSC
Very Low Period Jitter Characteristic:
–
±
100 ps at 20 MHz Output
–
±
75 ps at 100 MHz and 200–400 MHz
Outputs
Includes Spread-Spectrum Clocking (SSC),
With Down Spread for 100 MHz and Center
Spread for 200–400 MHz
HCLK Differential Outputs for the 100 MHz
and the 200–400 MHz Clock
Operates From Single 3.3-V Supply
Packaged in TSSOP20
Characterized for the Industrial Temperature
Range -40
°
C to 85
°
C
ESD Protection Exceeds JESD22
2000-V Human-Body Model (A114-C) –
MIL-STD-883, Method 3015
XIN
1
20
XOUT
2
TSSOP 20
19
VSS
3
18
VDD
4
17
20MHZ
5
16
VSS
6
15
EN
7
14
IDO
8
13
SDATA
9
12
SCLK
10
11
IREF
VDD
100MHZ
100MHZ
VSS
VSS
300MHZ
300MHZ
VSS
VDD
TYPICAL APPLICATIONS
Central Clock Generator for DLP Systems
DESCRIPTION
The CDCDLP223 is a PLL-based high performance
clock synthesizer that is optimized for use in DLP
systems. It uses a 20 MHz crystal to generate the
fundamental frequency and derives the frequencies
for the 100 MHz HCLK and the 300 MHz HCLK
output.
Further,
the
CDCDLP223
buffered copy of the 20 MHz Crystal Oscillator
Frequency at the 20 MHz output terminal.
CDCDLP223
SCAS836–DECEMBER 2006
3.3 V Clock Synthesizer for DLP Systems
CDCDLP223 PIN ASSIGNMENTS
The 100 MHz HCLK output provides the reference
clock for the XDR Clock Generator (CDCD5704).
Spread-spectrum clocking with 0.5% down spread,
which reduces Electro Magnetic Interference (EMI),
is
applied
in
the
default
spread-spectrum clocking (SSC) is turned on and off
via the serial control interface.
configuration.
The
The 300 MHz HCLK output provides a 200-400 MHz
clock signal for the DMD Control Logic of the DLP
Control ASIC. Frequency selection in 20 MHz steps
is
possible
via
the
serial
Spread-spectrum clocking with
±
1.0% or
±
1.5%
center spread is applied, which can be disabled via
the serial control interface
control
interface.
The CDCDLP223 features a fail safe start-up circuit,
which enables the PLLs only if a sufficient supply
voltage is applied and a stable oscillation is delivered
from the crystal oscillator. After the crystal start-up
time and the PLL stabilization time, all outputs are
ready for use.
The CDCDLP223 works from a single 3.3-V supply
and is characterized for operation from –40
°
C to
85
°
C.
generates
a
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 2006, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDCDLP223PW | 功能描述:時鐘合成器/抖動清除器 3.3V Clock Synth for DLP Systems RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDCDLP223PWG4 | 功能描述:時鐘合成器/抖動清除器 3.3V Clock Synth for DLP Systems RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDCDLP223PWR | 功能描述:時鐘合成器/抖動清除器 3.3V Clock Synth for DLP Systems RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDCDLP223PWRG4 | 功能描述:時鐘合成器/抖動清除器 3.3V Clock Synth for DLP Systems RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CDCE18005 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Five/Ten Output Clock Generator/Buffer |
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