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參數資料
| 型號： | CDP1020 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | SMBus/I2C ACPI Dual Device Bay Controller |
| 中文描述： | I2C BUS CONTROLLER, PDSO28 |
| 封裝： | PLASTIC, MS-013AE, SOIC-28 |
| 文件頁數： | 1/23頁 |
| 文件大小： | 154K |
| 代理商： | CDP1020 |
2-418
File Number
4704
CDP1020
SMBus/I
2
C ACPI Dual Device Bay
Controller
The CDP1020 is an ACPI compliant Device Bay Controller
(DBC) that can control two device bays. The controller
interfaces to the host system through the industry standard
I
2
C or System Management Bus (SMBus) and is fully
compliant with Device Bay Specification 0.90. The CDP1020
is designed to be compatible with the integrated SMBus host
controller of the PiiX4/PiiX6 in Intel Architecture platforms.
The CDP1020 is designed to be placed on the host
motherboard, on a riser, or adjacent to the Device Bay
connectors. The required clock source is generated from an
internal oscillator on the CLK pin, with an external RC to set
the frequency. This lowers the system cost and allows the
CDP1020 to remain active during S3-S5 system states
where all clock generators have been stopped.
One of the key features of this device is the on-chip level
shifters that provide slew rate controlled, direct gate drive for
external N-Channel MOSFETs (Intersil HUF76113DK8
recommended) to switch the device bay V
ID
supplies.
Switching an N-Channel device as opposed to a P-Channel
reduces both device cost and device count, resulting in an
overall lower system cost.
Configuration data for the CDP1020, including subsystem
vendor ID, subsystem revision, bay size and device bay
capabilities are designed to be written into the CDP1020 by
the system BIOS at power up. The registers for this data are
write-once-only and thus become read-only after the initial
BIOS write.
The address selection pins (AD1 and AD0) allow the
CDP1020 to occupy any one of four I
2
C/SMBus addresses.
This enables up to four CDP1020 devices to coexist in a
system.
The CDP1020 implements high current outputs for direct
drive (with a limiting resistor) of the optional bay status
LEDs. These indicators are two color (green/amber)
common anode or anti-parallel LEDs that indicate the device
bay status per the Device Bay Specification 0.90.
For More Information Contact:
Mike Coletta (714) 433-0600
Terry Pierce (407) 729-5835
Features
Fully Compliant with Device Bay Specification 0.90 and
ACPI Specification 1.0
Industry Standard SMBus/I
2
C Interface
Controls for Two Device Bays
Onboard Level Shifting for Direct Drive of N-Channel
MOSFET V
ID
Switches
Integrated Pull-up Resistors on 1394PRx, USBPRx,
SECUREx, and REMREQx Inputs
RC Type Oscillator - Low Cost and Low Power
Consumption
Operational Voltage from 3.3 to 5.5V
“5V Tolerant” Inputs at all Operating Voltages
Write-Once BIOS/External Configuration
Removal Request Input for Each Bay
Security Lock Input for Each Bay
High Current Device Bay LED Indicator Drivers With
Separate High-Side Power Input
Configurable Level/Pulse Bay Solenoid Drivers
Programmable Insertion Time Out Delay
HCMOS Technology; 28 Lead Plastic SOIC
Pinout
CDP1020 (SOIC)
TOP VIEW
Ordering Information
PART
NUMBER
TEMP. RANGE
(
o
C)
PACKAGE
PKG. NO.
CDP1020
0 to 85
28 Ld SOIC
M28.3
LEDA1
REMREQ1
V
DD
LEDA0
LEDG0
SFTLOCK1
PWREN0
V
GATE
LEDG1
USBPR1
1394PR1
RESET
ALRT
SCK
SDA
USBPR0
1394PR0
SFTLOCK0
PWREN1
SECURE1
SECURE0
REMREQ0
V
LED
15
16
17
18
23
24
25
26
28
27
10
9
8
7
6
5
4
3
2
1
14
13
12
11
19
20
21
22
AD0
AD1
TEST (V
DD
)
V
SS
CLK
Data Sheet
April 1999
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
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相關代理商/技術參數 |
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