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參數(shù)資料
| 型號： | CDP1857CE |
| 廠商： | INTERSIL CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit Bus Buffer/Separator |
| 中文描述： | QUAD 1-BIT DRIVER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 25K |
| 代理商： | CDP1857CE |
4-62
CDP1857C
4-Bit Bus Buffer/Separator
Features
Provides Easy Connection of I/O to CDP1800-Series
Microprocessor Data Bus
Non-Inverting Fully Buffered Data Transfer
Description
The CDP1857C is a 4-bit CMOS non-inverting bus separator
designed for use in CDP1800-series microprocessor systems. It can
be controlled directly by a 1800-series microprocessor without the
use of additional components.
The CDP1857 is designed for use as a bus buffer or separator
between the 1800-series microprocessor data bus and I/O devices.
It provides a chip-select (CS) input signal which, when high (1),
enables the bus-separator three-state output drivers. The direction
of data flow, when enabled, is controlled by the MRD input signal.
In the CDP1857, when MRD = 1, it enables the three-state bus drivers
(DB0-DB3) and transfers data from the DATA-IN lines onto the data
bus. When MRD = 0, it disables the three-state bus drivers (DB0-
DB3) and enables the three-state data output drivers (DO0-DO3),
thus, transferring data from the data bus to the DATA-OUT terminals.
The CDP1857 can be used as a bidirectional bus buffer by connecting
the corresponding DI and DO terminals (Figure 1). The MRD output
signal from the 1800-series microprocessor has the correct polarity to
control the CDP1857 when it is used as I/O bus buffer/separator.
Therefore, the 1800-series microprocessor MRD signal can be
connected directly to the MRD input of CDP1857. See Function Table
1 for use of the CDP1857 as an I/O bus buffer/separator.
The CDP1857C is supplied in 16-lead hermetic, dual-in-line ceramic
packages (D suffix), and in 16-lead plastic packages (E suffix).
Pinout
16 LEAD DIP
TOP VIEW
Functional Diagram For CDP1857
Ordering Information
PART
NUMBER
TEMP. RANGE
-40
o
C to +85
o
C
-40
o
C to +85
o
C
PACKAGE
PKG. NO.
CDP1857CE
PDIP
E16.3
CDP1857CD
SBDIP
D16.3
TABLE 1. CDP1857 FUNCTION FOR I/O BUS SEPARATOR
OPERATION
CS
MRD
DATA BUS OUT
DB0-DB3
DATA OUT
DO0-DO3
0
X
High Impedance
High Impedance
1
0
High Impedance
Data Bus
1
1
Data In
High Impedance
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
DI0
DI1
DO0
DO1
DO2
DO3
V
SS
DI2
V
DD
DB0
DB1
DB2
DB3
MRD
DI3
CS
2
15
3
1
4
7
5
9
6
10
14
DB0
CS
DI0
DO0
DI1
DO1
DI2
DO2
DI3
DO3
16 = V
DD
8 = V
SS
MRD
13
DB1
12
DB2
11
DB3
March 1997
File Number
1192.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1857D | 制造商:Harris Corporation 功能描述: |
| CDP1857D3 | 制造商:Harris Corporation 功能描述: |
| CDP1857E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| CDP1858/3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| CDP1858C/3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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