
4-66
CDP1871A,
CDP1871AC
CMOS Keyboard Encoder
Description
The CDP1871A is a keyboard encoder designed to
directly interface between a CDP1800-series micro-
processor and a mechanical keyboard array, providing
up to 53 ASCII coded keys and 32 HEX coded keys,
as shown in the system diagram (Figure 1).
The keyboard may consist of simple single-pole
single-throw (SPST) mechanical switches. Inputs are
provided for alpha-lock, control, and shift functions,
allowing 160 unique codes. An external R-C input is
available for user-selectable debounce times. The N-
key lock-out feature prevents unwanted key codes if
two or more keys are pressed simultaneously.
The CDP1871A and CDP1871AC are functionally
identical. They differ in that the CDP1871A has a
recommended operating voltage range of 4V to 10.5V,
and the CDP1871AC has a recommended operating
voltage range 4V to 6.5V. These types are supplied in
40 lead dual-in-line ceramic packages (D suffix), and
40 lead dual-in-line plastic packages (E suffix), and 44
lead plastic chip-carrier packages (Q suffix).
Features
Directly Interfaces with CDP1800-Series Microprocessor
Low Power Dissipation
Three-State Outputs
Scans and Generates Code for 53 Key ASCII Keyboard Plus
32 HEX Keys (SPST Mechanical Contact Switches)
Shift, Control, and Alpha Lock Input
RC-Controlled Debounce Circuitry
Single Supply 4V to 10.5V. . . . . . . . . . . . . (CDP1871A)
4V to 6.5V. . . . . . . . . . . . . (CDP1871AC)
N-Key Lockout
Ordering Information
PACKAGE
TEMP. RANGE
-40
o
C to +85
o
C
-40
o
C to +85
o
C
-40
o
C to +85
o
C
5V
10V
PKG.
NO.
PDIP
CDP1871ACE
CDP1871AE E40.6
PLCC
CDP1871ACQ
-
N44.65
SBDIP
CDP1871ACD
CDP1871AD D40.6
Burn-In
CDP1871ACDX
-
D40.6
REFERENCE APP NOTE 7374
August 1996
File Number
1374.2
Pinouts
40 LEAD PDIP, CERDIP
TOP VIEW
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
10
11
12
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
S1
S2
S3
S4
S5
S6
S7
S8
V
SS
28
27
26
25
24
23
22
21
40
39
38
37
36
35
34
33
32
31
30
29
V
DD
SHIFT
CONTROL
ALPHA
DEBOUNCE
RTP
TPB
DA
BUS 7
BUS 6
BUS 5
BUS 4
BUS 3
BUS 2
BUS 1
BUS 0
CS4
CS3
CS2
CS1
44 LEAD PLCC
(Q Suffix) TOP VIEW
44 43 42 41 40
39
38
37
36
35
34
33
32
31
30
29
28
27
1
2
3
4
5
6
20 21 22 23 24 25 26
19
18
7
8
9
10
11
12
13
14
15
16
17
D5
D6
D7
D8
D9
D10
D11
S1
S2
S3
S4
N
D
D
D
D
V
D
S
C
A
D
N
S
S
S
S
V
C
C
C
C
B
N
RPT
TPB
DA
BUS 7
BUS 6
BUS 5
BUS 4
BUS 3
BUS 2
BUS 1
NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil Corporation 1999