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參數資料
| 型號： | CDP68HC68P1 |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS Serial 8-Bit Input/Output Port |
| 中文描述： | CMOS串行8位輸入/輸出端口 |
| 文件頁數： | 1/24頁 |
| 文件大小： | 139K |
| 代理商： | CDP68HC68P1 |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
August 1997
CDP68HC68T1
CMOS Serial Real-Time Clock With
RAM and Power Sense/Control
Features
SPI (Serial Peripheral Interface)
Full Clock Features
- Seconds, Minutes, Hours (12/24, AM/PM), Day of
Week, Date, Month, Year (0-99), Automatic Leap Year
32 Word x 8-Bit RAM
Seconds, Minutes, Hours Alarm
Automatic Power Loss Detection
Low Minimum Standby (Timekeeping) Voltage. . . 2.2V
Selectable Crystal or 50/60Hz Line Input
Buffered Clock Output
Battery Input Pin that Powers Oscillator and also
Connects to V
DD
Pin When Power Fails
Three Independent Interrupt Modes
- Alarm
- Periodic
- Power-Down Sense
Description
The
time/calendar function, a 32 byte static RAM, and a 3 wire
Serial Peripheral Interface (SPI Bus). The primary function of
the clock is to divide down a frequency input that can be
supplied by the on-board oscillator in conjunction with an
external crystal or by an external clock source. The internal
oscillator can operate with a 32KHz, 1MHz, 2MHz, or 4MHz
crystal. An external clock source with a 32KHz, 1MHz,
2MHz, 4MHz, 50Hz or 60Hz frequency can be used to drive
the CDP68HC68T1. The time registers hold seconds,
minutes, and hours, while the calendar registers hold day-of-
week, date, month, and year information. The data is stored
in BCD format. In addition, 12 or 24 hour operation can be
selected. In 12 hour mode, an AM/PM indicator is provided.
The T1 has a programmable output which can provide one
of seven outputs for use elsewhere in the system.
CDP68HC68T1
Real-Time
Clock
provides
a
Computer handshaking is controlled with a “wired-OR”
interrupt output. The interrupt can be programmed to provide
a signal as the result of: 1) an alarm programmed to occur at
a predetermined combination of seconds, minutes, and
hours; 2) one of 15 periodic interrupts ranging from sub-
second to once per day frequency; 3) a power fail detect.
The PSE output and the V
SYS
input are used for external
power control. The CPUR output is available to reset the
processor under power-down conditions. CPUR is enabled
under software control and can also be activated via the
CDP68HC68T1’s watchdog. If enabled, the watchdog
requires a periodic toggle of the CE pin without a serial
transfer.
Pinouts
CDP68HC68T1 (PDIP, SBDIP, SOIC)
TOP VIEW
CDP68HC68T1 (SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CDP68HC68T1E
-40 to 85
16 Ld PDIP
E16.3
CDP68HC68T1D
-40 to 85
16 Ld SBDIP
D16.3
CDP68HC68T1M
-40 to 85
20 Ld SOIC
M20.3
CDP68HC68T1M2
-40 to 85
16 Ld SOIC
M16.3
CDP68HC68T1W
-40 to 85
DIE
NOTE: Pin number references throughout this specification refer to
the 16 lead PDIP/SBDIP/SOIC. See pinouts for cross reference.
9
10
11
12
13
14
16
15
8
7
6
5
4
3
2
1
CLKOUT
CPUR
INT
SCK
MOSI
MISO
V
SS
CE
V
DD
XTAL IN
V
BATT
V
SYS
XTAL OUT
LINE
POR
PSE
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
CLK OUT
CPUR
INT
NC
SCK
MOSI
CE
MISO
V
SS
PSE
VDD
XTAL IN
NC
V
BATT
XTAL OUT
V
SYS
NC
NC
LINE
POR
File Number
1547.3
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