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參數(shù)資料
| 型號： | CDP68HC68S1 |
| 廠商： | Intersil Corporation |
| 英文描述： | Serial Multiplexed Bus Interface(串行多路總線接口) |
| 中文描述： | 復(fù)用串行總線接口（串行多路總線接口） |
| 文件頁數(shù)： | 1/14頁 |
| 文件大小： | 72K |
| 代理商： | CDP68HC68S1 |
6-84
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
407-727-9207
|
Copyright
Intersil Corporation 1999
CDP68HC68S1
Serial Multiplexed Bus Interface
Description
The CDP68HC6SS1 Serial Bus Interface Chip (SBlC) provides
a means of interfacing in a Small Area Network configuration,
various microcomputers (MCU’s) containing serial ports. Such
MCU’s include the family of 68HC05 microcontrollers. The SBlC
provides a connection from an MCU’s Serial Communication
Interface (asynchronous UART type interface) or Serial Periph-
eral Interface (synchronous) to a medium speed asynchronous
two wire differential signal bus designed to minimize electro-
magnetic interference. This two wire bus forms the network bus
to which all MCU’s are connected (through SBI chips). See Fig-
ure 1. Each MCU operates independently and may be added or
deleted from the bus with little or no impact on bus operation.
Such a bus is ideal for inter-microcomputer communication in
hazardous electrical environments such as automobiles, aircraft
or industrial control systems.
In addition to acting as bus arbitor and interface for microcom-
puter SCI port to differential bus communication, the
CDP68HC68S1 contains all the circuitry required to convert
and synchronize Non-Return-to-Zero (NRZ) 8-bit data received
on the differential bus and clock the data into a microcomputer’s
SPl port. Likewise, data to be sent by a microcomputer’s SPI
port is converted to asynchronous format by appending start
and stop bits before transmitting to other microcomputers.
Refer to the data sheet for the CDP68HCO5C4 for additional
information regarding CDP68HCO5 microcomputers and their
Serial Communications and Serial Peripheral Interfaces.
The CDP68HC68S1 is supplied in a 14 lead dual-in-line plastic
package (E suffix), and in a 20 lead small outline plastic pack-
age (M suffix).
Operating voltage ranges from 4V to 7V and operating temper-
ature ranges from -40
o
C to +105
o
C.
Features
Differential Bus for Minimal EMl
High Common Mode Noise Rejection
Ideal for Twisted Pair Wiring
Data Collision Detection
Bus Arbitration
Idle Detection
Programmable Clock Divider
Power-On Reset
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
PACKAGE
CDP68HC68S1E
-40
o
C to +105
o
C
14 Lead PDIP
CDP68HC68S1M
-40
o
C to +105
o
C
20 Lead SOIC (W)
April 1994
File Number
1918.3
Pinouts
CD68HC68S1 (PDIP)
TOP VIEW
CD68HC68S1 (SOIC)
TOP VIEW
CLK
A
B
MODE
BUS+
BUS-
V
SS
V
DD
CONTROL
IDLE
CS
SCK
REC
XMIT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
CLK
A
B
MODE
NC
NC
NC
BUS+
BUS-
V
SS
V
DD
CONTROL
NC
IDLE
CS
SCK
NC
NC
REC
XMIT
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| CDP68HC68T1 | CMOS Serial Real-Time Clock With RAM and Power Sense/Control |
| CDP68HC68T1D | CMOS Serial Real-Time Clock With RAM and Power Sense/Control |
| CDP68HC68T1E | CMOS Serial Real-Time Clock With RAM and Power Sense/Control |
| CDP68HC68T1M | CMOS Serial Real-Time Clock With RAM and Power Sense/Control |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDP68HC68S1E | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Serial Multiplexed Bus Interface |
| CDP68HC68S1M | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Serial Multiplexed Bus Interface |
| CDP68HC68T WAF | 制造商:Harris Corporation 功能描述: |
| CDP68HC68T1 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Serial Real-Time Clock With RAM and Power Sense/Control |
| CDP68HC68T1_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS Serial Real-Time Clock With RAM and Power Sense/Control |
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