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參數(shù)資料
| 型號： | CH7002D |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Scalable VGA to NTSC/PAL Encoder |
| 中文描述： | 可擴展顯卡至NTSC / PAL編碼器 |
| 文件頁數(shù)： | 1/36頁 |
| 文件大小： | 199K |
| 代理商： | CH7002D |
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Preliminary
CHRONTEL
201-0000-029 Rev 6.1, 8/2/99
1
CH7002D
Scalable VGA to NTSC/PAL Encoder
Features
Fully integrated solution for PC to TV display
TrueScale
TM
rendering engine supports underscan
operation for both 640x480 or 800x600 inputs
Advanced 3-line digital flicker filtering with
programmable algorithm selections
Fully programmable through I
2
C port or hardware
(pin-based) controls
Wide range of VGA software drivers for full
synchronization and image positioning
Auto-detection of TV presence
Programmable power management features three
power-down modes
Supports both NTSC and PAL (B, D, G, H, or I) TV
formats onto both composite and S-Video
Triple 8-bit ADC inputs and triple 8-bit DAC outputs
On-chip reference generation and loop filter
Offered in 44-pin PLCC package
General Description
Chrontel’s CH7002 VGA to NTSC/PAL encoder is a stand-
alone integrated circuit which provides a PC 99 compliant
solution for TV output. It accepts RGB analog inputs directly
from VGA controllers and converts them directly into NTSC
or PAL TV format, with simultaneous composite and
S-Video outputs.
This circuit integrates a digital NTSC/PAL encoder with 8-
bit ADC and DAC interfaces, a 3-line vertical filter, and low-
jitter phase-locked loop to create outstanding quality video.
Through Chrontel’s TrueScale
TM
rendering technology, the
CH7002 supports full vertical and horizontal underscan
operation from either 640x480 or 800x600 input to either
NTSC or PAL outputs.
A high level of performance along with full programmability
makes the CH7002 ideal for system-level PC or Web
browser solutions. All features are software programmable,
through a standard I
2
C port, to enable fully integrated system
solutions by using a TV as the primary display device.
Patent number 5,781,241
Figure 1: Functional Block Diagram
ADC
ADC
ADC
DIGITAL
NTSC/PAL
ENCODER
DAC
DAC
DAC
PLL
OSC
SYSTEM CLOCK
R
G
B
Y
CVBS
C
RSET
RSET
SD
XI
XO
COLOR
SPACE
CONVERTER
I
2
C REGISTER & CONTROL
BLOCK
ADDR
SC
& FILTER
VREF
VREF1
VREF2
LINE
MEMORY
LINE RENDERING ENGINE
-SCALING
-DEFLICKERING
-SCAN CONVERSION
TIMING & SYNC GENERATOR
R
G
B
Y
U
V
Y
U
V
PMODE
L
R
U
D
XCLK
V
H
CLKOUT
相關PDF資料 |
PDF描述 |
|---|---|
| CH7002D-V | Scalable VGA to NTSC/PAL Encoder |
| CH7004C | Digital PC to TV Encoder with Macrovision |
| CH7004C-T | Digital PC to TV Encoder with Macrovision |
| CH7004C-V | Digital PC to TV Encoder with Macrovision |
| CH7007A | DIGITAL PC TO TV ENCODER WITH MACROVISION |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CH7002D-V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Scalable VGA to NTSC/PAL Encoder |
| CH7003B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7003B-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7003B-V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7004C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder with Macrovision |
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