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參數資料
| 型號： | CL7192SQC160-15 |
| 英文描述： | Laser-Programmable Complex PLD |
| 中文描述： | 激光可編程復雜可編程邏輯器件 |
| 文件頁數： | 1/16頁 |
| 文件大小： | 183K |
| 代理商： | CL7192SQC160-15 |
December 2000
Page 1
CL7128E
CL7128S
CL7160E
CL7160S
CL7192E
CL7192S
CL7256E
CL7256S
Useable Gates
2,500
3,200
3,750
5,000
Macrocells
128
160
192
256
Logic Blocks
8
10
12
16
Max user I/O pins
100
104
124
164
-5, -6, -7, -10,
-12, -15, -20
-5, -6, -7, -10,
-12, -15, -20
-6, -7, -10,
-12, -15, -20
-6, -7, -10,
-12, -15, -20
84-pin PLCC
100-pin TQFP
84-pin PLCC
100-pin TQFP
160-pin PQFP
160-pin PQFP
208-pin PQFP
100-pin PQFP
160-pin PQFP
100-pin PQFP
160-pin PQFP
208-pin RQFP
7K tbl 01B
Parameter
Packages
Speed Grades
u
Laser Processed Logic Device (LPLD) technology offers
the ultimate combination of performance, flexibility, and
low cost
u
Functionally, architecturally, and electrically compatible
with industry-standard Altera
MAX
7000
u
High Density
-
3,700 Usable gates
-
192 Macrocells
-
152 Maximum user I/O pins
u
Laser fuse technology provides very fast, dense
interconnect routing
u
Low current consumption
u
Supports 3.3 volt or 5.0 volt I/O operation
u
Alpha particle immune
CL7000 Product Family Overview
CL7192E
CL7192S
Laser Processed Logic Device Family
Key Features
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