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參數(shù)資料
型號(hào): CLC5612
廠商: National Semiconductor Corporation
英文描述: Dual, High Output, Programmable Gain Buffer
中文描述: 雙路,高輸出,可編程增益緩沖器
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 208K
代理商: CLC5612
Features
I
130mA output current
I
0.15%, 0.02° differential gain, phase
I
1.5mA/ch supply current
I
90MHz bandwidth (A
v
= +2)
I
-87/-93dBc HD2/HD3 (1MHz)
I
17ns settling to 0.05%
I
290V/
μ
s slew rate
I
Stable for capacitive loads up to 1000pf
I
Single 5V to ±5V supplies
Applications
I
Video line driver
I
Coaxial cable driver
I
Twisted pair driver
I
Transformer/coil driver
I
High capacitive load driver
I
Portable/battery-powered applications
I
A/D driver
OUT1
-IN1
+IN1
-V
CC
OUT2
-IN2
+IN2
+V
CC
1k
+
-
+
-
1k
1k
1k
Typical Application
Differential Line Driver with Load Impedance Conversion
Pinout
DIP & SOIC
General Description
The CLC5612 is a dual, low-cost, high-speed (90MHz) buffer
which features user-programmable gains of +2, +1, and
-1V/V. The CLC5612 also has a new output stage that delivers
high output drive current (130mA), but consumes minimal
quiescent supply current (1.5mA/ch) from a single 5V supply. Its
current feedback architecture, fabricated in an advanced comple-
mentary bipolar process, maintains consistent performance over
a wide range of gains and signal levels, and has a linear-phase
response up to one half of the -3dB frequency.
The CLC5612 offers 0.1dB gain flatness to 18MHz and differen-
tial gain and phase errors of 0.15% and 0.02°. These features are
ideal for professional and consumer video applications.
The CLC5612 offers superior dynamic performance with a
90MHz small-signal bandwidth, 290V/
μ
s slew rate and 6.2ns
rise/fall times (2V
step
). The combination of low quiescent power,
high output current drive, and high-speed performance make
the CLC5612 well suited for many battery-powered personal
communication/computing systems.
The ability to drive low-impedance, highly capacitive loads,
makes the CLC5612 ideal for single ended cable applications.
It also drives low impedance loads with minimum distortion.
The CLC5612 will drive a 100
load with only -74/-86dBc
second/third harmonic distortion (A
v
= +2, V
out
= 2V
pp
, f = 1MHz).
With a 25
load, and the same conditions, it produces only -70/
-67dBc second/third harmonic distortion. It is also optimized for
driving high currents into single-ended transformers and coils.
When driving the input of high-resolution A/D converters, the
CLC5612 provides excellent -87/-93dBc second/third harmonic
distortion (A
v
= +2, V
out
= 2V
pp
, f = 1MHz, R
L
= 1k
) and fast
settling time.
Maximum Output Voltage vs. R
L
O
p
)
R
L
(
)
1
2
3
4
5
6
7
8
9
10
10
100
1000
V
s
= +5V
V
CC
=
±
5V
CLC5612
Dual, High Output, Programmable Gain Buffer
N
June 1999
C
D
1999 National Semiconductor Corporation
Printed in the U.S.A.
http://www.national.com
+
V
o
-
R
t2
V
in
R
t
R
m/2
R
m/2
R
L
Z
o
UTP
I
o
R
eq
1:n
V
d/2
1
7
6
8
5
3
4
2
1k
+
-
+
-
1k
1k
1k
CLC5612
-V
d/2
Note:
Supplies and bypassing not shown.
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相關(guān)代理商/技術(shù)參數(shù)
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CLC5612IM 制造商:Rochester Electronics LLC 功能描述:- Bulk
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CLC5612M WAF 制造商:Texas Instruments 功能描述:
CLC561A8 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Wideband, Low Distortion DriveR-Amps
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