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參數(shù)資料
| 型號： | CLC5957 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 12-bit, 70MSPS Broadband Monolithic A/D Converter |
| 中文描述： | 12位，70MSPS寬帶單片A / D轉(zhuǎn)換 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 631K |
| 代理商： | CLC5957 |
1999 National Semiconductor Corporation
Printed in the U.S.A.
http://www.national.com
N
General Description
The CLC5957 is a monolithic 12-bit, 70MSPS analog-to-digital
converter. The device has been optimized for use in IF-sampled
digital receivers and other applications where high resolution,
high sampling rate, wide dynamic range, low power dissipation,
and compact size are required. The CLC5957 features differential
analog inputs, low jitter differential universal clock inputs, a low
distortion track-and-hold with 0-300MHz input bandwidth, a band-
gap voltage reference, data valid clock output, TTL compatible
CMOS (3.3V or 2.5V) programmable output logic, and a propri-
etary 12-bit multi-stage quantizer. The CLC5957 is fabricated on
the ABIC-V 0.8 micron BiCMOS process.
The CLC5957 features a 74dBc spurious free dynamic range
(SFDR) and a 67dB signal to noise ratio (SNR). The wideband
track-and-hold allows sampling of IF signals to greater than
250MHz. The part produces two-tone, dithered, SFDR of 83dBFS
at 75MHz input frequency. The differential analog input provides
excellent common mode rejection, while the differential universal
clock inputs minimize jitter. The 48-pin TSSOP package provides
an extremely small footprint for applications where space is a
critical consideration. The CLC5957 operates from a single +5V
power supply. Operation over the industrial temperature range of
-40°C to +85°C is guaranteed. National Semiconductor tests
each part to verify compliance with the guaranteed specifications.
ADC Block Diagram
CLC5957
12-bit, 70MSPS Broadband Monolithic A/D Converter
Features
70MSPS
Wide dynamic range
SFDR: 74dBc
SFDR w/dither: 85dBFS
SNR: 67dB
IF sampling capability
Input bandwidth = 0-300MHz
Low power dissipation: 640mW
Very small package: 48-pin TSSOP
Single +5V supply
Data valid clock output
Programmable output levels:
3.3V or 2.5V
Applications
Cellular base-stations
Digital communications
Infrared/CCD imaging
IF sampling
Electro-optics
Instrumentation
Medical imaging
High definition video
October 1999
C
1
3Q
T/H
A
In
3
3Q
3
3Q
3
3Q
3
Bit Align/Error Correct
12
Clock
In
ADC
DAV
12
IF
~
IF
Input
(1typ.)
(
DVGA
CLC5957
12-bit
70MSPS
ADC
Filter
AGC
20
3-bit (Gain Control)
BPF
DAV
CLC5902
First IF Receiver
IMTD
IMTD
MTD
N
ME79TG
CL5956
ME79TG
Actual Size
O
Frequency (MHz)
0
-10
-100
-90
-80
-70
-60
-50
-40
-30
-20
0
8
28
4
12
16
20
24
32
F
in
= 25.3MHZ
F
sample
= 66MHz
Single Tone Output Spectrum w/Dither
S
Input (dBFS)
90
80
0
10
20
30
40
50
60
70
-125
-50
-25
0
-75
-100
Receiver SINAD vs. Input Amplitude
Decimation/filter = 190/0.8
Output BW = 50M/190 X 0.8 = 210KHz
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PDF描述 |
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| CLC5957MTD | 12-bit, 70MSPS Broadband Monolithic A/D Converter |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC5957_02 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit, 70MSPS Broadband Monolithic A/D Converter |
| CLC5957MTD | 制造商:Texas Instruments 功能描述:IC 12BIT ADC 70MSPS BB MONOLITHIC |
| CLC5957MTD/NOPB | 功能描述:CONV A/D 12BIT 70MSPS 48TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
| CLC5957MTDX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit, 70MSPS Broadband Monolithic A/D Converter |
| CLC5957MTDX/NOPB | 功能描述:IC CONV A/D 12BIT MONO 48-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):12 采樣率（每秒）:3M 數(shù)據(jù)接口:- 轉(zhuǎn)換器數(shù)目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數(shù)目和類型:- |
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