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參數資料
| 型號： | CM3121-02SH |
| 廠商： | California Micro Devices Corporation |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Dual Linear Voltage Regulator for DDR-I and DDR-II Memory |
| 中文描述： | 雙線性穩壓器，用于DDR I和DDR - II內存 |
| 文件頁數： | 1/11頁 |
| 文件大小： | 219K |
| 代理商： | CM3121-02SH |
2004 California Micro Devices Corp. All rights reserved.
11/12/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
●
Fax: 408.263.7846
●
www.calmicro.com
1
CM3121
PRELIMINARY
Dual Linear Voltage Regulator for DDR-I and DDR-II Memory
Features
Fully integrated power solution for DDR memory
ICs
Ideal for DDR-I (2.5V
DDQ
) and DDR-II (1.8V
DDQ
)
Lowest system cost and smallest footprint with just
two external output capacitors
Two linear regulators:
- V
DDQ
regulator with a maximum output current
of 1.5A shared by DRAM and V
TT
regulator
- source-sink V
TT
regulator with maximum out-
put current of 0.5A (DDR-I) or 0.3A (DDR-II)
Fault output indicates overcurrent condition in
either regulator, under voltage lock-out and over-
temperature condition
Reverse current protection if host is powered off
PSOP-8 package with integrated heat spreader
Lead-free versions available
Applications
DDR-I and DDR-II memory power for:
Set Top Boxes, DVD Players, Games
Digital TVs, Flat Panel Displays
Printers, Digital Projectors
Embedded systems
Communications systems
Product Description
The CM3121 provides an integrated power solution for
DDR-I and DDR-II memory systems in consumer electron-
ics applications. The CM3121 is ideal for a 2.8V to 3.6V
supply for DDR-I memory and 2.2V to 2.8V for DDR-II mem-
ory. The CM3121 features two independent linear regula-
tors for V
DDQ
and V
TT
supply regulation. The default
voltage for V
DDQ
is 2.5V. The V
DDQ
regulator SENSE pin
allows for setting V
DDQ
in the 2.2V to 2.8V range, or DDR-II
memories from 1.7V to 1.9V. The V
TT
regulator output is
always half the V
DDQ
voltage, derived internally. A capacitor
should be connected to each of the two outputs.
When EN_DDR is set high, the two DDR regulators are dis-
abled to minimize overall system power dissipation such as
when memory is in standby.
The FAULT pin goes low whenever either of the two regula-
tors goes into current limit mode, the input voltage drops too
far or if overtemp occurs.
The CM3121 is available in a PSOP-8 package that has
excellent thermal dissipation.
It is available with optional
lead-free finishing.
.
Typical Application Circuit
Circuit Schematic
V
REF
R
R
FAULT
V
TT
=1.25V
V
DDQ
= 2.5V
V
DDQ
REGULATOR
V
TT
REGULATOR
EN_DDR
V
CC
GND
C
DDQ
DDR
MEMORY
CPU
CORE
+ I/O
C
CC
C
TT
Enable DDR
Memory #
2.8V to 3.3V
SENSE V
TT
V
TT
V
DDQ
SENSE
V
DDQ
CURRENT LIMIT
OVERTEMP
LOW INPUT
V
REF
R
R
FAULT
V
DDQ
REGULATOR
V
TT
REGULATOR
GND
SENSE V
TT
V
TT
V
DDQ
SENSE
V
DDQ
CURRENT LIMIT
OVERTEMP
LOW INPUT
SENSE_V
TT
VTT
SENSE_ V
DDQ
V
DDQ
V
CC
EN_DDR
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