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參數(shù)資料
| 型號(hào)： | CO8950ALV |
| 廠商： | Raltron Electronics Corporation |
| 英文描述： | CLOCK |
| 中文描述： | 鐘 |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大小： | 122K |
| 代理商： | CO8950ALV |
CLOCK
Page 1 of 2
9X14 PECL J-LEAD CLOCK- PB FREE COMPLIANT
(SEE PAGE TWO FOR PART NUMBERING SCHEME)
"
APPROVALS
RALTRON
Eng. approval, date: RONEN 3/20/03
Sales approval, date:
Created by, date: RONEN 3/20/03
Revision:
"
MECHANICAL SPECIFICATION
RALTRON ELECTRONICS CORP.
!
10651 N.W. 19
t h
St
!
Miami, Florida 33172
!
U.S.A.
phone: +001(305) 593-6033
!
fax: +001(305)594-3973
!
e-mail: sales@raltron.com
!
internet: http:/www.raltron.com
13.96 MAX.
9
.550 MAX
.
.
.
.018 TYP.
.46 TYP.
.100 TYP.
2.54 TYP.
4
.300 ±008
7.61±.20
.
.
8
9
.
.
.018 T YP.
.46 T YP.
.200 T YP.
5.08 T YP.
4
7.61 ±.20
.
.
8
.
.550
.300 ± 008
CUSTOMER
Name (please print):
Title (please print):
Signature, date:
6
pin Version
4 pin Version
OUTLINE TOLERANCE:
±0.015” / 0.4mm
(Unless otherwise specified)
PIN FUNCTIONS (6 pins):
[1] NC OR COMP. OUTPUT
[2] EN / DIS OR NC
[3] CASE / GROUND
[4] OUTPUT
[5] COMP. OUTPUT OR NC
[6] SUPPLY VOLTAGE
PIN FUNCTIONS (4 pins):
[1] E/ D OR N/C OR COMP. OUT
[2] CASE / GROUND
[3] OUTPUT
[4] SUPPLY VOLTAGE
MARKING (EXAMPLE):
CE8950A-LZ
155.520-T-C-EL
RAL D/C
"
ELECTRICAL SPECIFICATION
PARAMETER
Frequency, nom
Supply voltage, nom.
Supply current, max.
(excluding load)
PECL output level
Duty cycle
Rise- / fall time, max.
Jitter, rms, max.
Overall freq. stability, max.
SYMBOL
fo
Vcc
Is
CONDITIONS
VALUE
UNIT
MHz
V
mA
-
Vcc±5%
Vcc=+3.3VDC/+5.0VDC
Ta=+25
°
C, 50
to Vcc-2.0VDC load
Vcc=+3.3VDC/+5.0VDC load=50
to Vcc-2.0VDC
load=50
to Vcc-2.0VDC / @50%Vcc, Ta=+25
°
C
20%~80% Vout, 80%~20% Vout, max
1
σ
, Fj=12KHz…20MHz
Including operating temperature, ±5% load & supply
variations, calibration @+25
°
C, and 10 year aging
Pin 2=Low, Vcc-1.620 (max.)
Pin 2=High, Vcc-1.025 (min.)
70.000~250.0
3.3VDC
100
5.0VDC
VOH / VOL
DC
tr / tf
J
f/fc
2.275 / 1.68
40…60 OR 45…55
0.100…1.0 (see note A)
1.0
SEE PART NUMBER
GENERATION TABLE
Enabled
Pin 4 will assume a fixed level of
logic “0”, and pin 5 will assume a
fixed level of logic“1”
SEE PART NUMBER
GENERATION TABLE
-55…+90
-0.5…+7.0
3/20/03
marketing-rfq, clock
3.975/3.38
V
%
ns
ps
ppm
Enable option
Disable option
En
Dis
-
-
Operating temperature range Ta
-
°
C
Storage temperature range
Absolute voltage range
NOTE A: RISE AND FALL TIME VALUES (tr/tf) ARE FREQUENCY DEPENDENT.
T(stg)
Vcc(abs)
-
Non-destructive, DC
°
C
V
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