
COP888GW
8-Bit Microcontroller with Pulse Train Generators and
Capture Modules
General Description
The COP888 family of microcontrollers uses an 8-bit single
chip core architecture fabricated with National Semiconduc-
tor’s M
2
CMOS
process technology. The COP888GW is a
member of this expandable 8-bit core processor family of mi-
crocontrollers. It is a fully static part, fabricated using
double-metal silicon gate microCMOS technology.
Features include an 8-bit memory mapped architecture,
MICROWIRE/PLUS
serial I/O, two 16-bit timer/counters
supporting three modes (Processor Independent PWM gen-
eration, External Event counter and Input Capture mode ca-
pabilities), four independent 16-bit pulse train generators
with 16-bit prescalers, two independent 16-bit input capture
modules with 8-bit prescalers, multiply and divide functions,
full duplex UART, and two power savings modes (HALT and
IDLE), both with a multi-sourced wake up/interrupt capability.
This multi-sourced interrupt capability may also be used in-
dependent of the HALT or IDLE modes.
Each I/O pin has software selectable configurations. The de-
vices operate over a voltage range of 2.5V–6V. High
throughput is achieved with an efficient, regular instruction
set operating at a maximum of 1 μs per instruction rate. The
device has low EMI emissions. Low radiated emissions are
achieved by gradual turn-on output drivers and internal I
filters on the chip logic and crystal oscillator. The device is
available in 68-pin PLCC package.
Key Features
n
Two 16-bit input capture modules with 8-bit prescalers
n
Four Pulse Train Generators with 16-bit prescalers
n
Full duplex UART
n
Two 16-bit timers, each with two 16-bit registers
supporting:
— Processor independent PWM mode
— External event counter mode
— Input capture mode
n
Quiet design (low radiated emissions)
n
16 kbytes on-board ROM
n
512 bytes on-board RAM
Additional Peripheral Features
n
Idle Timer
n
Multi-Input Wake-Up (MIWU) with optional interrupts (8)
n
MICROWIRE/PLUS
serial I/O
I/O Features
n
Memory mapped I/O
n
Software selectable I/O options ( TRI-STATE
Output,
Push-Pull Output, Weak Pull-Up Input, High Impedance
Input)
n
Schmitt trigger inputs on port G
n
Package:
68-pin PLCC
CPU/Instruction Set Features
n
1 μs instruction cycle time
n
Fourteen multi-source vectored interrupts servicing:
— External Interrupt with selectable edge
— Idle Timer T0
— Two Timers (each with 2 interrupts)
— MICROWIRE/PLUS
— Multi-Input Wake-Up
— Software Trap
— UART (2)
— Capture Timers
— Counters (one vector for all four counters)
— Default VIS (default interrupt)
n
Versatile and easy-to-use instruction set
n
8-bit Stack Pointer SP—(stack in RAM)
n
Two 8-bit register indirect data memory pointers
(B and X)
Fully Static CMOS
n
Two power saving modes: HALT and IDLE
n
Low current drain (typically
<
1 μA)
n
Single supply operation: 2.5V–5.5V
n
Temperature range: 40C to +85C
Development Support
n
Emulation and OTP device
n
Real time emulation and full program debug offered by
MetaLink’s Development System
is a registered trademark of National Semiconductor Corporation.
TRI-STATE
, MICROWIRE/PLUS
, COPS
, MICROWIRE
and WATCHDOG
are trademarks of National Semiconductor Corporation.
IBM
, PC
, PC-AT
and PC/XT
are registered trademarks of International Business Machines Corporation.
iceMASTER
is a trademark of MetaLink Corporation.
PRELIMINARY
August 1996
C
2000 National Semiconductor Corporation
DS012065
www.national.com