
COP8ACC Family
8-Bit CMOS ROM Based and OTP Microcontrollers with
4k or 16k Memory and High Resolution A/D
General Description
The COP8ACC Family ROM based microcontrollers are
highly integrated COP8
Feature core devices with 4k
memory and advanced features including a High-Resolution
A/D. These single-chip CMOS devices are suited for appli-
cations requiring a full featured, low EMI controller with an
A/D (only one external capacitor required). COP8ACC7 de-
vices are pin and software compatible (different V
range)
16k OTP EPROM versions for pre-production. Erasable win-
dowed versions are available for use with a range of COP8
software and hardware development tools.
Family features include an 8-bit memory mapped architec-
ture, 4 MHz CKI with 2.5μs instruction cycle, 6 channel A/D
with 12-bit resolution, analog capture timer, analog current
source and V
/2 reference, one multi-function 16-bit timer/
counter, MICROWIRE/PLUS serial I/O, two power saving
HALT/IDLE modes, MIWU, high current outputs, software
selectable I/O options, WATCHDOG
timer and Clock Moni-
tor, Low EMI 2.5V to 5.5V operation and 20/28 pin packages.
Devices included in this datasheet are:
Device
Memory (bytes)
RAM (bytes)
I/O Pins
Packages
Temperature
COP8ACC5xxx9
4k ROM
128
15/23
20 SOIC, 28 DIP/SOIC
0 to +70C
COP8ACC5xxx8
4k ROM
128
15/23
20 SOIC, 28 DIP/SOIC
-40 to +85C
COP8ACC7xxx9
16k OTP EPROM
128
15/23
20 SOIC, 28 DIP/SOIC
0 to +70C
COP8ACC7xxx8
16k OTP EPROM
128
15/23
20 SOIC, 28 DIP/SOIC
-40 to +85C
Key Features
n
Analog Function Block with 12-bit A/D including
— Analog comparator with seven input mux
— Constant Current Source and V
Reference
— 16-bit capture timer (upcounter) clocked from CKI
with auto reset on timer startup
n
Quiet design (reduced radiated emissions)
n
4096 bytes on-board ROM or 16,384 OTP EPROM with
security feature
n
128 bytes on-board RAM
Additional Peripheral Features
n
Idle Timer
n
One 16-bit timer with two 16-bit registers supporting:
— Processor Independent PWM mode
— External Event counter mode
— Input Capture mode
n
Multi-Input Wake-Up (MIWU) with optional interrupts
n
WATCHDOG and clock monitor logic
n
MICROWIRE/PLUS
serial I/O with programmable shift
clock-polarity
I/O Features
n
Software selectable I/O options (Push-Pull Output, Weak
Pull-Up Input, High Impedance Input)
n
High current outputs
n
Schmitt Trigger inputs on ports G and L
n
Packages: 28 DIP/SO with 23 I/O pins,
20 SO with 15 I/O pins
CPU/Instruction Set Features
n
2.5 μs instruction cycle time
n
Eight multi-source vectored interrupt servicing
— External Interrupt
— Idle Timer T0
— Timer T1 associated Interrupts
— MICROWIRE/PLUS
— Multi-Input Wake Up
— Software Trap
— Default VIS
— A/D (Capture Timer)
n
8-bit Stack Pointer (SP)—stack in RAM
n
Two 8-bit Registers Indirect Data Memory Pointers
(B and X)
Fully Static CMOS
n
Two power saving modes: HALT and IDLE
n
Single supply operation: 2.5V to 5.5V for COP8ACC5
n
Single supply operation: 2.7V to 5.5V for COP8ACC7
n
Temperature ranges: 0C to +70C, 40C to +85C
Development System
n
Emulation and OTP devices
n
Real time emulation and full program debug offered by
MetaLink development system
Applications
n
Battery Chargers
n
Appliances
n
Data Acquisition systems
COP8
, MICROWIRE
, MICROWIRE/PLUS
, and WATCHDOG
are trademarks of National Semiconductor Corporation.
TRI-STATE
is a registered trademark of National Semiconductor Corporation.
iceMASTER
is a registered trademark of MetaLink Corporation.
July 2000
C
4
2001 National Semiconductor Corporation
DS012865
www.national.com