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參數資料
| 型號： | COP8TAC9HLQ8 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS ROM Microcontroller with 2k or 4k Memory |
| 中文描述： | 8-BIT, FLASH, 15 MHz, MICROCONTROLLER, QCC44 |
| 封裝： | LLP-44 |
| 文件頁數： | 1/59頁 |
| 文件大小： | 1128K |
| 代理商： | COP8TAC9HLQ8 |
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COP8TAB9/TAC9
8-Bit CMOS Flash Microcontroller with 2k Byte or 4k
Byte Memory
1.0 General Description
The COP8TAB9/TAC9 Flash microcontrollers are highly in-
tegrated COP8
Feature core devices, with 2k or 4k Flash
memory and advanced features. These single-chip CMOS
devices are suited for applications requiring a full featured,
in-system reprogrammable controller with moderate memory
and low EMI. The same device is used for development,
pre-production and volume production with a range of COP8
software and hardware development tools.
A Masked ROM device (COP8TAB5/TAC5) has been devel-
oped and provides identical features except for the Boot
ROM and Flash Memory and related features such as In-
System Programming and reprogrammability. The ROM de-
vice is supported, in emulation, by this device.
The lack of the Boot ROM and Flash Memory in the ROM
device, prompts us to caution the user, utilizing the
COP8TAx9 Flash based devices during development for
applications to be produced using the COP8TAx5 ROM de-
vices, to ensure that code contains NO calls to Boot ROM
functions prior to submission for ROM generation. Instances
of the JSRB instruction in ROM based devices will be ex-
ecuted as a JSR instruction to a location in the first 256 bytes
of Program Memory.
Device included in this datasheet:
Device
Flash Program
Memory (kbytes)
2
4
RAM
(bytes)
128
128
I/O
Pins
Packages
Temperature
COP8TAB9
COP8TAC9
16, 24 or 40
20 and 28 SOIC WIDE,
44 LLP
40C to +85C
2.0 Features
KEY FEATURES
n
2k bytes or 4k bytes Flash Program Memory, with
Security Feature, organized in 512 byte pages that can
be erased or written individually
n
128 bytes volatile RAM
n
2.25V – 2.75V In-System Programmability of Flash
n
High endurance - 20k Erase/Write Cycles
n
Superior Data Retention - 100 years
n
Crystal Oscillator at 15 MHz or Integrated RC Oscillator
at 10MHz
n
Clock Prescaler For Adjusting Power Dissipation to
Processing Requirements
n
Power-On Reset
n
HALT/IDLE Power Save Modes
n
One 16-bit timer:
— Processor Independent PWM mode
— External Event counter mode
— Input Capture mode
n
High Current I/Os
— 10 mA
@
0.4V
OTHER FEATURES
n
Single supply operation:
— 2.25V–2.75V (40C to +85C)
n
Quiet Design (low radiated emissions)
n
Multi-Input Wake-Up with optional interrupts
n
MICROWIRE/PLUS (Serial Peripheral Interface
Compatible)
n
ACCESS.Bus Synchronous Serial Interface (compatible
with I2C
and SMBus
)
— Master Mode and Slave Mode
— Full Master Mode Capability
— Bus Speed Up To 400KBits/Sec
— Low Power Mode With Wake-Up Detection
— Optional 1.8V ACCESS.Bus Compatibility
n
Eight multi-source vectored interrupts servicing:
— External Interrupt
— Idle Timer T0
— One Timers (with 2 interrupts)
— MICROWIRE/PLUS Serial peripheral interface
— ACCESS.Bus/I
2
C/SMBus compatible Synchronous
Serial Interface
— Multi-Input Wake-Up
— Software Trap
n
Idle Timer with programmable interrupt interval
n
8-bit Stack Pointer SP (stack in RAM)
n
Two 8-bit Register Indirect Data Memory Pointers
n
True bit manipulation
n
WATCHDOG and Clock Monitor logic
n
Software selectable I/O options
— TRI-STATE Output/High Impedance Input
— Push-Pull Output
— Weak Pull Up Input
n
Schmitt trigger inputs on I/O ports
n
Temperature range: –40C to +85C
n
Packaging: 20 and 28 SOIC and 44 LLP
is a registered trademark of National Semiconductor Corporation.
COP8
is a registered trademark of Phillips Corporation.
SMBus is a trademark of Intel Corporation.
February 2005
C
2005 National Semiconductor Corporation
DS200475
www.national.com
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