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參數資料
| 型號： | CS2540-9PD6B1 |
| 廠商： | POWER-ONE INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 2-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封裝： | METAL, CASE S02, MODULE |
| 文件頁數： | 24/33頁 |
| 文件大小： | 438K |
| 代理商： | CS2540-9PD6B1 |
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S Series Data Sheet
100 Watt AC-DC and DC-DC Converters
APR 26, 2006 revised to SEP 25, 2006
Page 30 of 33
www.power-one.com
V output (V0, V2, V3):
Connector pin V is internally connected to the open collector of
an NPN transistor. The emitter is connected to Vo1- or Vo-.
VV ≤ 0.6 V (logic low) corresponds to a monitored voltage level
(Vi and/or Vo1) <Vt. The current IV through the open collector
should not exceed 50 mA. The NPN output is not protected
against external overvoltages. VV should not exceed 60 V.
Vi, Vo1 status
V output,
VV
Vi or Vo1 < Vt
low, L,
VV ≤ 0.6 V at IV = 50 mA
Vi and Vo1 > Vt + Vh
high, H,
IV ≤ 25 A at VV = 5.1 V
Fig. 35
Output configuration of options V0, V2, and V3
Vo1+
Vo1–
V
VV
IV
Rp
Input
11009
Threshold tolerances and hysteresis:
If Vi is monitored, the internal input voltage is measured after the
input filter. Consequently, this voltage differs from the voltage at
the connector pins by the voltage drop DVti across the input
filter. The threshold level of option V0 is adjusted during
manufacture at Io nom and TA = 25 °C. The value of ΔVti
depends upon the input voltage range (AS, BS, etc.), threshold
level Vt, temperature and input current. The input current is a
function of input voltage and output power.
ΔV
ti
Vhi
VV low
VV
VV high
Vi
P
o
=
P
o
nom
P
o
=
0
P
o
=
0
Vti
P
o
=
P
o
nom
11023
Fig. 36
Definition of Vti, ΔVti and Vhi
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