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參數資料
型號: CS3706
廠商: ZF Electronics Corporation
英文描述: IC AC/DC CONV 15V 300MA SIP12
中文描述: 雙輸出驅動器
文件頁數: 1/6頁
文件大小: 151K
代理商: CS3706
1
Features
F/F Enable
INHIBIT A
INV
V
IN
STOP -
INHIBIT REF
V
OUTB
Gnd
V
OUTA
V
CC
INHIBIT B
NONINV
STOP +
Logic
Logic
-
+
+
A
Inh
B
Inh
Stop
Amp
Digital
Input
Logic
Logic
Voltage
Regulator
Thermal
Shutdown
Analog
Stop
Latch
Toggle
Flip
Flop
+5V
Q
T
Q
+5V
+5V
+5V
+5V
+5V
+5V
+5V
+5V
R
S
+V
IN
130mV
I
Dual 1.5A Totem Pole
Outputs
40nsec Rise and Fall into
1000pF
Parallel or Push-Pull
Operation
Single-Ended to Push-Pull
Conversion
High-Speed Power
MOSFET Compatible
Low Cross-Conduction
Current Spike
Analog Latched
Shutdown
Internal Deadband Inhibit
Circuit
Low Quiescent Current
5V to 40V Operation
Thermal Shutdown
Protection
I
I
I
I
I
I
I
I
I
I
C
Dual Output Driver
CS3706
Description
Block Diagram
The CS3706 integrated circuit pro-
vides an interface between low-
level TTL inputs and high-power
switching devices such as power
MOSFETs. A typical application is
single-ended PWM control to push-
pull power control conversion.
The primary function of this device
is to convert a bipolar single-ended
low current digital input to a pair of
totem pole outputs which can
source or sink up to 1.5A. An inter-
nal flip-flop, driven by double-
pulse suppression logic, can be
enabled to provide single-ended to
push-pull conversion. With the flip-
flop disabled, the outputs work in
parallel for 3.0A capability.
Protection functions are also includ-
ed for pulse-by-pulse current limit-
ing, automatic deadband control
and thermal shutdown.
Package Options
16 Lead PDIP
(Internally Fused Leads)
1
INHIBIT B
2
3
4
5
6
7
8
INV
NONINV
Gnd
Gnd
V
OUTA
F/F ENABLE
V
CC
16
15
14
13
12
11
10
9
INHIBIT A
INHIBIT REF
V
IN
Gnd
Gnd
V
OUTB
STOP +
STOP -
Note: All Four Ground
Pins must be Connected
to Common Ground.
A
Company
¨
Rev. 4/29/99
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
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