
Copyright
Cirrus Logic, Inc. 2006
(All Rights Reserved)
http://www.cirrus.com
Advance Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
30
W Quad Half-Bridge Digital Amplifier Power Stage
Features
Configurable Outputs (10% THD+N)
–
2 x 15 W into 8
Ω
, Full-Bridge
–
1 x 30 W into 4
Ω
, Parallel Full-Bridge
–
4 x 7 W into 4
Ω
, Half-Bridge
–
2 x 7 W into 4
Ω
, Half-Bridge + 1 x 15 W
into 8
Ω
, Full-Bridge
Space-Efficient Thermally-Enhanced QFN
–
No External Heat Sink Required
> 100 dB Dynamic Range - System Level
0.1% THD+N @ 1 W - System Level
Built-In Protection with Error Reporting
–
Over-current
–
Thermal Warning and Overload
–
Under-voltage
+9 V to +18 V High Voltage Supply
PWM Popguard
for Quiet Startup
High Efficiency (85%)
Low R
DS(ON)
Low Quiescent Current
Low Power Standby Mode
Common Applications
Integrated Digital Televisions
Portable Docking Stations
Mini/Micro Shelf Systems
Powered Desktop Speakers
General Description
The CS4412 is a high-efficiency power stage for digital
Class-D amplifiers designed to input PWM signals from
a modulator such as the CS4525. The power stage out-
puts can be configured as four half-bridge channels, two
half-bridge channels and one full-bridge channel, two
full-bridge channels, or one parallel full-bridge channel.
The CS4412 integrates on-chip over-current, under-
voltage, over-temperature protection and error report-
ing as well as a thermal warning indicator. The low
R
DS(ON)
outputs can source up to 2.4 A peak current,
delivering 85% efficiency. This efficiency provides for a
small device package and lower power supplies.
The CS4412 is available in a 48-pin QFN package in
Commercial grade (-40 to +70° C). The CRD4412 cus-
tomer reference design is also available. Please refer to
“Ordering Information” on page 22
for complete order-
ing information.
VP
Amplifier
Out 1
Amplifier
Out 2
PGND
Amplifier
Out 3
Amplifier
Out 4
Gate
Drive
Gate
Drive
Gate
Drive
Gate
Drive
2.5 V to 5 V
9 V to 18 V
In 1
In 2
In 3
In 4
Non-Overlap
Time Insertion
Non-Overlap
Time Insertion
Non-Overlap
Time Insertion
Non-Overlap
Time Insertion
Protection &
Error Reporting
Current &
Thermal Data
Control Logic
Hardware
Configuration
Reset
Mode
Configuration
SEPTEMBER '06
DS749A1
CS4412