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參數資料
型號: CS5233-3GDPR5
元件分類: 基準電壓源/電流源
英文描述: THREE-TERMINAL POSITIVE FIXED VOLTAGE REGULATORS
中文描述: 三端固定電壓調節器
文件頁數: 1/12頁
文件大?。?/td> 95K
代理商: CS5233-3GDPR5
Semiconductor Components Industries, LLC, 2001
May, 2001 – Rev. 5
1
Publication Order Number:
CS5233–3/D
CS5233-3
500 mA and 1.5 A, 3.3 V
Dual Input Linear Regulator
with Auxiliary Control
The CS5233–3 provides a glitch–free 3.3 V output from one of three
possible supplies, (V
IN
, V
SB
and 3.3 V
AUX
). An on–chip linear
regulator powers the output when either V
IN
or V
SB
is available.
Otherwise AuxDrv turns on an external PFET, which connects the
3.3 V
AUX
supply to the output. The CS5233–3 is intended to provide
power to an ASIC on a PCI Network Interface Card (NIC), and meets
Intel’s “Instantly Available” power requirements which follow from
the Advanced Configuration and Power Interface (ACPI) standards.
Other applications include desktop computers, power supplies with
multiple input sources, and PCMCIA interface cards.
The CS5233–3 linear regulator provides a fixed 3.3 V output at up
to 1.5 A with an overall accuracy of
±
2%. The internal NPN–PNP
composite pass transistor provides a low dropout voltage and requires
less supply current than a straight PNP design. Full protection with
both current limit and thermal shutdown is provided. Designed for low
reverse current, the IC prevents excessive current from flowing from
V
OUT
to either V
IN
or ground when the regulator input voltage is
lower than the output. The auxiliary drive control feature allows the
use of an external PFET to supply power to the output when the
regulator supplies are off.
The CS5233–3 regulator is available in two package types: the 5
Lead D
2
PAK package (TO–263) and 8 Lead SOIC with 4 Lead Fused
(DF8) package. When powered from the V
IN
source, the D
2
PAK is
rated for 1.5 A and the 8 Lead SOIC is rated for 500 mA. Both
packages are rated for 500 mA when only powered from the V
SB
source.
Features
Linear Regulator
3.3 V
±
2% Output Voltage
Current Limit
Thermal Shutdown with Hysteresis
400
μ
A Reverse Current
ESD Protected
System Power Management
Auxiliary Supply Control
“Glitch Free” Transition Between 3 Sources
Similar to CS5231–3
High Output Current Capability
1.5 A D
2
PAK
500 mA 8 Lead SOIC DF8
Internally Fused Leads in SO–8 Package
http://onsemi.com
PIN CONNECTIONS AND
MARKING DIAGRAMS
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
Device
Package
Shipping
ORDERING INFORMATION
CS5233–3GDP5
D
2
PAK
50 Units/Rail
CS5233–3GDPR5
D
2
PAK
750 Tape & Reel
CS5233–3GDF8
SO–8
95 Units/Rail
CS5233–3GDFR8
SO–8
2500 Tape & Reel
SO–8
D SUFFIX
CASE 751
Pin 1. V
SB
2. V
IN
3. GND
4. V
OUT
5. AuxDrv
D
2
PAK
5–PIN
DP SUFFIX
CASE 936F
CS5233–3
AWLYWW
1
1
5
GND
AuxDrv
1
5
A
8
GND
V
OUT
GND
V
IN
GND
V
SB
1
8
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