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參數資料
型號: CS53L21
廠商: Cirrus Logic, Inc.
元件分類: ADC
英文描述: Low Power, Stereo Analog to Digital Converter
中文描述: 低功耗,立體聲模數轉換器
文件頁數: 1/66頁
文件大小: 566K
代理商: CS53L21
Copyright
Cirrus Logic, Inc. 2006
(All Rights Reserved)
http://www.cirrus.com
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
MAY ‘06
DS700PP1
Low Power, Stereo Analog to Digital Converter
FEATURES
98 dB Dynamic Range (A-wtd)
-88 dB THD+N
Analog Gain Controls
+32 dB or +16 dB MIC Pre-Amplifiers
Analog Programmable Gain Amplifier
(PGA)
+20 dB Digital Boost
Programmable Automatic Level Control (ALC)
Noise Gate for Noise Suppression
Programmable Threshold and
Attack/Release Rates
Independent Left/Right Channel Control
Digital Volume Control
High-Pass Filter Disable for DC Measurements
Stereo 3:1 Analog Input MUX
Dual MIC Inputs
Programmable, Low Noise MIC Bias Levels
Differential MIC Mix for Common Mode
Noise Rejection
Very Low 64 Fs Oversampling Clock Reduces
Power Consumption
SYSTEM FEATURES
24-bit Conversion
4 kHz to 96 kHz Sample Rate
Multi-bit Delta Sigma Architecture
Low Power Operation
Stereo Record (ADC): 8.72 mW @ 1.8 V
Stereo Record (MIC to PGA and ADC):
13.73 mW @ 1.8 V
Variable Power Supplies
1.8 V to 2.5 V Digital & Analog
1.8 V to 3.3 V Interface Logic
Power Down Management
ADC, MIC Pre-Amplifier, PGA
Software Mode (I2C
& SPI
Control)
Hardware Mode (Stand-Alone Control)
Flexible Clocking Options
Master or Slave Operation
Digital Routing Mixes
Mono Mixes
1.8 V to 3.3 V
Multibit
Oversampling
ADC
Multibit
Oversampling
ADC
Serial Audio
Output
1.8 V to 2.5 V
MUX
PGA
P
CRegister
L
Reset
Software Mode
Control Data
Stereo Input 1
Stereo Input 2
Stereo Input 3 /
Mic Input 1 & 2
PGA
+32 dB
+32 dB
Volume
Controls
ALC
MIC
Bias
MUX
MUX
High Pass
Filters
ALC
Digital
Signal
Processing
Engine
Hardware Mode
or I
C & SPI
CS53L21
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相關代理商/技術參數
參數描述
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