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參數資料
| 型號： | CS61310 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | T1 Line Interface Unit(T1線接口單元) |
| 中文描述： | T1線路接口單元（T1線接口單元） |
| 文件頁數： | 1/30頁 |
| 文件大小： | 466K |
| 代理商： | CS61310 |
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Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
1
Copyright
Cirrus Logic, Inc. 1999
(All Rights Reserved)
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
DS440PP2
AUG ‘99
CS61310
T1 Line Interface Unit
Features
I
Provides T1 Line Interface
I
No Crystal Needed for Jitter Attenuation
I
Greater than 14dB of Transmit Return Loss
I
Meets AT&T 62411 Jitter Tolerance and Attenua-
tion Requirements
I
Meets ANSI T1.231B Requirements for LOS and AIS
I
AWG for User Programmable Pulse Shapes
I
TX Driver High Impedance / Low Power Control
I
Generation and Detection of Loop Up / Loop Down
Signaling
I
Selectable Unipolar or Bipolar I/O
I
Compliant with:
— American National Standards (ANSI): T1.102, T1.105,
T1.403, T1.408, and T1.231
— FCC Rules and Regulations: Part 68 and Part 15
— AT&T Publication 62411
— TR-NET-00499
Description
The CS61310 is a T1 primary rate line interface unit. It
combines the complete analog transmit and receive cir-
cuitry for a single, full-duplex interface at T1 rates. The
device is pin and function compatible with the Level One
LXT310.
Enhanced functionality is available through an extended
register set allowing custom pulse shape generation and
generation and detection of loop up and loop down
codes. The CS61310 features Crystal
crystalless jitter
attenuation.
ORDERING INFORMATION
CS61310-IL
CS61310-IP
28-pin PLCC
28-pin PDIP
TCLK
TDATA/TPOS
UBS/TNEG
JASEL
RCLK
RDATA/RPOS
BPV/RNEG
INT/NLOOP
LOS
2
3
4
E
N
C
O
D
E
R
REMOTE
LOOPBACK
8
7
6
D
E
C
O
D
E
R
23
12
INBAND
NLOOP
& LOS
PROCESSOR
RECEIVE
CLOCK
GENERATOR
9
10
XTALIN
XTALOUT
5
21
22
14
15
MODE
RV+
RGND TGND
TV+
JITTER
ATTEN
TIMING
& DATA
RECOVERY
LOS/
NLOOP
Clear
REGISTERS & CONTROL LOGIC
TAOS Enable
LBO Select
JITTER
ATTEN
TRANSMIT
TIMING &
CONTROL
PULSE
SHAPING
CIRCUITRY
ROM / RAM
LINE DRIVERS
SERIAL
PORT
LLOOP
Enable
LOCAL
LOOPBACK
(ANALOG)
EQUALIZER
CONTROL
SLICERS
& PEAK
DETECT
NOISE &
CROSSTALK
FILTERS
MAGNITUDE
EQUALIZER
AGC
13
16
28
26
27
24
25
18
19
20
1
TTIP
TRING
CLKE/TAOS
CS/RLOOP
SCLK/LLOOP
SDI/LBO1
SDO/LBO2
LATN
RTIP
RRING
MCLK
LOCAL
LOOPBACK
(DIGITAL)
11
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| CS61318-IP | E1 LINE INTERFACE UNIT |
| CS61318-IL | E1 LINE INTERFACE UNIT |
| CS61535A | T1/E1 LINE INTERFACE |
| CS61535A-IL1 | T1/E1 LINE INTERFACE |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CS61310-IL | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:T1 INE INTERFACE UNIT |
| CS61310-ILZR | 制造商:Cirrus Logic 功能描述:T1 LINE INTRFC 28PLCC - Tape and Reel |
| CS6131-4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| CS61318 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:E1 LINE INTERFACE UNIT |
| CS61318-IL | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:E1 LINE INTERFACE UNIT |
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