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參數資料
型號: CY241V08A-05T
廠商: Cypress Semiconductor Corp.
英文描述: MPEG Clock Generator with VCXO
中文描述: 的MPEG時鐘發生器,石英振蕩器
文件頁數: 1/6頁
文件大小: 122K
代理商: CY241V08A-05T
MPEG Clock Generator with VCXO
CY241V08A-05,06
Cypress Semiconductor Corporation
Document #: 38-07670 Rev. **
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised April 09, 2004
Features
Integrated phase-locked loop (PLL)
Low-jitter, high-accuracy outputs
VCXO with analog adjust
3.3V operation
Compatible with MK3727 (–5, –6)
Application compatibility for a wide variety of designs
Enables design compatibility
Lower drive strength settings (CY241V08A–06)
Benefits
Digital VCXO control
Electromagnetic interference (EMI) reduction for standards
compliance
Second source for existing designs
Highest-performance PLL tailored for multimedia applica-
tions
Meets critical timing requirements in complex system
designs
Part
Number
Outputs
1
Input Frequency Range
13.5-MHz pullable crystal input per
Cypress specification
Output
Frequencies
1 copy of 27 MHz non-linear
VCXO Control
Curve
Other Features
Compatible with
MK3727A non linear
VCXO control
Same as CY241V08A–05
except lower drive
strength
CY241V08A–05
CY241V08A–06
1
13.5-MHz pullable crystal input per
Cypress specification
1 copy of 27 MHz non-linear
CY241V08A–05,–06 Logic Block Diagram
13.5 XIN
XOUT
OUTPUT
DIVIDERS
PLL
OSC
VCXO
Q
P
VCO
VDD
VSS
Φ
27 MHz
8-pin SOIC
CY241V08A–05,–06
1
2
3
4
XOUT
XIN
VCXO
VSS
27 MHz
NC or VSS
NC or VDD
5
6
7
8
VDD
Pin Configurations
相關PDF資料
PDF描述
CY241V08A-06T MPEG Clock Generator with VCXO
CY241V08A Clock Generator with VCXO(帶VCXO的時鐘發生器)
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相關代理商/技術參數
參數描述
CY241V08A-06 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:MPEG Clock Generator with VCXO
CY241V08A-06T 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:MPEG Clock Generator with VCXO
CY241V08A-11 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:MPEG Clock Generator with VCXO
CY241V08A-12 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Generator with VCXO
CY241V08A-41 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:MPEG Clock Generator with VCXO
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