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參數資料
| 型號： | CY26049 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | FailSafe PacketClock Global Communications Clock Generator(FailSafe PacketClock全局通訊時鐘發生器) |
| 中文描述： | 故障安全PacketClock全球通信時鐘發生器（故障保護PacketClock全局通訊時鐘發生器） |
| 文件頁數： | 1/7頁 |
| 文件大小： | 144K |
| 代理商： | CY26049 |
FailSafe PacketClock Global Communications
Clock Generator
CY26049-36
Cypress Semiconductor Corporation
Document #: 38-07415 Rev. *C
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised July 16, 2004
Features
Fully integrated phase-locked loop (PLL)
FailSafe
output
PLL driven by a crystal oscillator that is phase aligned
with external reference
Output frequencies selectable and/or programmed to
standard communication frequencies
Low-jitter, high-accuracy outputs
Commercial and Industrial operation
3.3V ± 5% operation
16-lead TSSOP
Benefits
Integrated high-performance PLL tailored for telecom-
munications frequency synthesis eliminates the need
for external loop filter components
Logic Block Diagram
When reference is in range, SAFE pin is driven high.
When reference is off, DCXO maintains clock outputs.
SAFE pin is low.
DCXO maintains continuous operation should the input
reference clock fail
Glitch-free transition simplifies system design
Selectable output clock rates include T1/DS1, E1,
T3/DS3, E3, and OC-3.
Works with commonly available, low-cost 18.432-MHz
crystal
Zero-ppm error for all output frequencies
Performance guaranteed for applications that require
an extended temperature range
Compatible across industry standard design platforms
Industry standard package with 6.4 x 5.0 mm
2
footprint
and a height profile of just 1.1 mm.
CLK/2
FS[3:0]
XIN
XOUT
ICLK
CLK
SAFE
High=ICLK detected
frequency select
Input reference
(typical 8 kHz)
external pullable crystal
(18.432 MHz)
8K
DIGITAL
CONTROLLED
CRYSTAL
OSCILLATOR
FAILSAFE
TM
CONTROL
PHASE
LOCKED
LOOP
OUTPUT
DIVIDERS
Pin Configuration
CY26049-36
16-pin TSSOP
Top View
ICLK
1
16 NC
8K
2
15 CLK
FS1
3
14 FS0
FS2
4
13 FS3
VDD
5
12 VDD
VSS
6
11 VSS
CLK/2
7
10 SAFE
XIN
8
9 XOUT
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相關代理商/技術參數 |
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| CY26049-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY26049-22 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FailSafe⑩ PacketClock⑩ Global Communications Clock Generator |
| CY26049-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY26049-36 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY26049-5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
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