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參數資料
| 型號： | CY26121ZI-2 |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PacketClock Spread Spectrum Clock Generator |
| 中文描述： | 33.33 MHz, OTHER CLOCK GENERATOR, PDSO16 |
| 封裝： | 4.40 MM, TSSOP-16 |
| 文件頁數： | 1/6頁 |
| 文件大小： | 62K |
| 代理商： | CY26121ZI-2 |
PacketClock Spread Spectrum Clock Generator
CY26121
Cypress Semiconductor Corporation
Document #: 38-07350 Rev. **
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised February 11, 2003
Features
Benefits
Integrated phase-locked loop (PLL)
High-performance PLL tailored for Spread Spectrum appli-
cation
Meets critical timing requirements in complex system
designs
Enables application compatibility
Works with commonly available crystal or driven reference
Downspread Spread Spectrum with 30-kHz nominal
modulation frequency
Low jitter, high-accuracy outputs
3.3V operation
25-MHz input frequency
66.66-MHz or 33.33-MHz selectable output frequency
(orig, -3,-11,-31)
33.33-MHz or 25-MHz selectable output frequency
(-2,-21)
Frequency Table for CLKA-D
Part Number
CY26121
CY26121-2
CY26121-3
CY26121-11
CY26121-21
CY26121-31
CLKSEL=0
66.66 MHz
33.33 MHz
66.66 MHz
66.66 MHz
33.33 MHz
66.66 MHz
CLKSEL=1
33.33
25.00
33.33
33.33
25.00
33.33
Spread%
–
2.8%
–
2.8%
–
1.4%
–
2.8%
–
2.8%
–
1.4%
Parallel Crystal Load
6 pF
6 pF
6 pF
15 pF
15 pF
15 pF
16-pin TSSOP
CY26121
25 MHz XIN
XOUT
CLKA
OUTPUT
MULTIPLEXER
AND
DIVIDERS
OSC.
CLKC
VDDL
AVSS
AVDD
VSS
CLKB
REF
VSSL
VDD
CLKD
PLL
with
Modulation Control
Flash Configuration
SSON
CLKSEL
Logic Block Diagram
Pin Configuration
1
2
3
4
5
6
7
8
9
10
VDD
AVDD
CLKSEL
VSSL
CLKA
XOUT
NC
REF
VSS
CLKD
VDDL
SSON
CLKC
11
12
13
14
15
16
XIN
CLKB
AVSS
相關PDF資料 |
PDF描述 |
|---|---|
| CY26121ZI-21 | PacketClock Spread Spectrum Clock Generator |
| CY26121ZI-21T | PacketClock Spread Spectrum Clock Generator |
| CY26121ZI-2T | PacketClock Spread Spectrum Clock Generator |
| CY26121ZI-3 | CAP PRX TPLSHLD SS M30 PNP QD |
| CY26121ZI-31 | CAP PROX TPLSHLD M30 EXTD PLUG |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CY26121ZI-21 | 功能描述:鎖相環 - PLL PacketClock(TM)Clk for Comm Apps RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY26121ZI-21T | 功能描述:鎖相環 - PLL PacketClock(TM)Clk for Comm Apps RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| CY26121ZI-2T | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PacketClock Spread Spectrum Clock Generator |
| CY26121ZI-3 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PacketClock Spread Spectrum Clock Generator |
| CY26121ZI-31 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:PacketClock Spread Spectrum Clock Generator |
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