
PRELIMINARY
133-MHz Spread Spectrum Clock Synthesizer with
Differential CPU Outputs
CY28322-2
Cypress Semiconductor Corporation
Document #: 38-07145 Rev. *B
3901 North First Street
San Jose
CA 95134
Revised December 14, 2002
408-943-2600
Features
Benefits
Compliant with Intel
CK-Titan and CK-408 clock
synthesizer/driver specifications
Multiple output clocks at different frequencies
—Two pairs of differential CPU outputs, up to 200 MHz
—Nine synchronous PCI clocks, three free-running
—Six 3V66 clocks
—Two 48-MHz clocks
—One reference clock at 14.318 MHz
—One VCH clock
Spread Spectrum clocking (down spread)
Power-down features (PCI_STOP#, CPU_STOP#
PWR_DWN#)
Two select inputs (Mode select & IC Frequency Select)
Supports up to four CPU clock frequencies
48-pin TSSOP package
Supports next generation Pentium
processors using
differential clock drivers
Motherboard clock generator
—
Support multiple CPUs and a chipset
—
Support for PCI slots and chipset
—
Supports AGP, DRCG reference, and Hub Link
—
Supports USB host and graphic controllers
—
Supports ISA slots and I/O chip
Enables reduction of EMI and overall system cost
Enables ACPI-compliant designs
Widely available, standard package enables lower cost
Logic Block Diagram
TSSOP
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
25
28
27
26
XTAL_IN
XTAL_OUT
GND_REF
PCI_F0
14
15
16
17
18
19
20
21
22
23
24
37
36
35
34
33
29
30
31
32
40
39
38
41
44
43
42
45
48
47
46
PCI2
66BUFF0/3V66_2
66BUFF1/3V66_3
66BUFF2/3V66_4
GND_CORE
PWR_GD#
SCLK
SDATA
GND_48 MHz
3V66_1/VCH
CPU2
CPU#2
CPU_STOP#
GND_PCI
VDD_3V66
GND_3V66
66IN/3V66_5
3V66_0
USB
CPU#1
GND_CPU
VDD_REF
PCI_F1
PCI_F2
PCI0
PCI1
VDD_PCI
PCI3
PCI4
PCI5
PWR_DWN#
VDD_CORE
GND_3V66
VDD_3V66
PCI_STOP#
VDD_48 MHz
DOT
S2
IREF
VDD_CPU
CPU1
VDD_CPU
S1
REF0
C
VDD_REF
REF
CPU1:2
CPU#1:2
PCI_F0:2
XTAL
OSC
PLL Ref Freq
X2
X1
VDD_PCI
USB (48MHz)
VCH_CLK/ 3V66_1
VDD_CPU
CPU_STOP#
SCLK
PCI0:5
PCI_STOP#
CStop
CStop
PLL 1
SMBus
Logic
DOT (48MHz)
PWR_DWN#
S1:2
VDD_48MHz
SDATA
VDD_3V66
3V66_0:1
3V66_2:4/
66BUFF0:2
Divider
Network
3V66_5/ 66IN
PWR
PWR
PWR
PWR
PWR
PLL 2
PWR
Gate
PWR_GD#
Pin Configurations
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